Optimal Realizations of Floorplans

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 12, Issue 6, 1993, Pages 793-801

  Chong, Kyunrak ^a   Sahni, Sartaj ^b  

^a Hong Ik University   (South Korea)

^b UNIVERSITY OF FLORIDA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; EQUIVALENT CIRCUITS; MINIMIZATION OF SWITCHING NETS; OPTIMIZATION; TREES (MATHEMATICS); VLSI CIRCUITS;

BRANCH AND BOUND ALGORITHMS; FLOORPLANS; PRIMITIVE SUPERBLOCKS; SLICING STRUCTURES; STOCKMEYER'S ALGORITHMS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0027610681     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.229753     Document Type: Article

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