A Unified Negative-Binomial Distribution for Yield Analysis of Defect-Tolerant Circuits

IEEE Transactions on Computers

Volumn 42, Issue 6, 1993, Pages 724-734

  Koren, Israel ^a   Koren, Zahava ^a   Stapper, Charles H ^b  

^a UNIVERSITY OF MASSACHUSETTS   (United States)

^b IBM   (United States)

Author keywords

Block size estimation; clusters; defect tolerance; fault; negative binomial distribution; VLSI circuits; yield

Indexed keywords

COMPUTER SIMULATION; ELECTRIC FAULT CURRENTS; ELECTRIC FAULT LOCATION; MATHEMATICAL MODELS; PROBABILITY; REDUNDANCY; VLSI CIRCUITS;

BLOCK SIZE ESTIMATION; DEFECT TOLERANCE; DEFECT TOLERANT CIRCUITS; FAULT CLUSTERS; LARGE AREA CLUSTERING; NEGATIVE BINOMIAL DISTRIBUTION; SMALL AREA CLUSTERING; YIELD ANALYSIS;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 0027607627     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.277291     Document Type: Article

References (10)

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