Prospects of multiple-valued VLSI processors

IEICE Transactions on Electronics

Volumn E76-C, Issue 3, 1993, Pages 383-392

  Hanyu, Takahiro ^a   Kameyama, Michitaka ^a   Higuchi, Tatsuo ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BINARY SEQUENCES; DIGITAL ARITHMETIC; LOGIC CIRCUITS; MANY VALUED LOGICS; MICROPROCESSOR CHIPS; ULSI CIRCUITS;

BINARY INTEGRATED CIRCUIT TECHNOLOGY; INTERCONNECTION DELAY; MULTIPLE VALUED HARDWARE ALGORITHM; MULTIPLE VALUED VLSI PROCESSORS;

VLSI CIRCUITS;

EID: 0027565403     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (19)