-
1
-
-
0024133785
-
High-level synthesis: Current status and future directions
-
June
-
G. Borriello and E. Detjens, “High-level synthesis: Current status and future directions,” in Proc. 25th Design Automation Conf., pp. 477–482, June 1988.
-
(1988)
Proc. 25th Design Automation Conf.
, pp. 477-482
-
-
Borriello, G.1
Detjens, E.2
-
2
-
-
0024706222
-
Algorithms for hardware allocation in data path synthesis
-
S. Devadas and A. R. Newton, “Algorithms for hardware allocation in data path synthesis,” in IEEE Trans. Computer-Aided Design, pp. 768–781, 1989.
-
(1989)
IEEE Trans. Computer-Aided Design
, pp. 768-781
-
-
Devadas, S.1
Newton, A.R.2
-
3
-
-
0024706222
-
Algorithms for hardware allocation in data path synthesis
-
July
-
S. Devadas and A. R. Newton, “Algorithms for hardware allocation in data path synthesis,” IEEE Trans. Computer-Aided Design, vol. 8, pp. 768–781, July 1989.
-
(1989)
IEEE Trans. Computer-Aided Design
, vol.8
, pp. 768-781
-
-
Devadas, S.1
Newton, A.R.2
-
4
-
-
0003827228
-
Markov Chains.
-
New York: Springer-Verlag
-
D. Freedman, Markov Chains. New York: Springer-Verlag, 1983.
-
(1983)
-
-
Freedman, D.1
-
5
-
-
0003603813
-
Computers and Intractability: A Guide to the Theory of NP-Completeness.
-
San Francisco, CA: Freeman
-
M. R. Garey and D. S. Johnson, Computers and Intractability: A Guide to the Theory of NP-Completeness. San Francisco, CA: Freeman, 1979.
-
(1979)
-
-
Garey, M.R.1
Johnson, D.S.2
-
7
-
-
84882892685
-
Automatic generation of microsequenced data paths to realize ADA circuit descriptions
-
Ph.D. dissertation, Carlton University, July
-
E. F. Girczyc, “Automatic generation of microsequenced data paths to realize ADA circuit descriptions,” Ph.D. dissertation, Carlton University, July, 1984.
-
(1984)
-
-
Girczyc, E.F.1
-
8
-
-
0003730487
-
A First Course in Stochastic Processes.
-
New York: Academic Press
-
S. Karlin, A First Course in Stochastic Processes. New York: Academic Press, 1973.
-
(1973)
-
-
Karlin, S.1
-
9
-
-
0023245908
-
ESP: A new standard cell placement package using simulated evolution
-
June
-
R. Kling and P. Banerjee, “ESP: A new standard cell placement package using simulated evolution,” in Proc. 24th Design Automation Conf., pp. 60–66, June 1987.
-
(1987)
Proc. 24th Design Automation Conf.
, pp. 60-66
-
-
Kling, R.1
Banerjee, P.2
-
11
-
-
0024751579
-
SILK: A simulated evolution router
-
Oct.
-
T. Lin, T. Hsu, and F. Tsai, “SILK: A simulated evolution router,” IEEE Trans. Computer-Aided Design, vol. CAD-8, pp. 210–215, Oct. 1989.
-
(1989)
IEEE Trans. Computer-Aided Design
, vol.CAD-8
, pp. 210-215
-
-
Lin, T.1
Hsu, T.2
Tsai, F.3
-
14
-
-
0024134190
-
Tutorial on high-level synthesis
-
June
-
M. C. McFarland, A. C. Parker, and R. Camposano, “Tutorial on high-level synthesis,” in Proc. 25th Design Automation Conf., pp. 330–336, June 1988.
-
(1988)
Proc. 25th Design Automation Conf.
, pp. 330-336
-
-
McFarland, M.C.1
Parker, A.C.2
Camposano, R.3
-
16
-
-
0024138655
-
Splicer: A heuristic approach to connectivity binding
-
June
-
B. M. Pangrle, “Splicer: A heuristic approach to connectivity binding,” in Proc. 25th Design Automation Conf., pp. 536–541, June 1988.
-
(1988)
Proc. 25th Design Automation Conf.
, pp. 536-541
-
-
Pangrle, B.M.1
-
18
-
-
85050214309
-
MAHA: A program for data path synthesis
-
June
-
A. C. Parker, J. Pizarro, and M. Milnar, “MAHA: A program for data path synthesis,” in Proc. 23rd Design Automation Conf., pp. 461–466, June 1986.
-
(1986)
Proc. 23rd Design Automation Conf.
, pp. 461-466
-
-
Parker, A.C.1
Pizarro, J.2
Milnar, M.3
-
19
-
-
0024906272
-
Scheduling and binding algorithms for high-level synthesis
-
June
-
P. G. Paulin and J. P. Knight, “Scheduling and binding algorithms for high-level synthesis,” in Proc. 26th Design Automation Conf., pp. 1–6, June 1989.
-
(1989)
Proc. 26th Design Automation Conf.
, pp. 1-6
-
-
Paulin, P.G.1
Knight, J.P.2
-
20
-
-
0344137923
-
High-level synthesis of digital circuits using global scheduling and binding algorithms
-
Ph.D. dissertation, Carlton Univ., Jan.
-
P. G. Paulin, “High-level synthesis of digital circuits using global scheduling and binding algorithms,” Ph.D. dissertation, Carlton Univ., Jan. 1988.
-
(1988)
-
-
Paulin, P.G.1
-
21
-
-
0024935662
-
An evolution-based approach to partitioning ASIC systems
-
June
-
Y. Saab and V. Rao, “An evolution-based approach to partitioning ASIC systems,” in Proc. 26th Design Automation Conf., pp. 767–770, June 1989.
-
(1989)
Proc. 26th Design Automation Conf.
, pp. 767-770
-
-
Saab, Y.1
Rao, V.2
-
22
-
-
84944987676
-
Automatic synthesis of specific image processing automata by a stimulated annealing based design space search
-
presented at the May
-
A. Safir and B. Zavidovique, “Automatic synthesis of specific image processing automata by a stimulated annealing based design space search,” presented at the 1989 Symp. on Circuits and Systems, May, 1989.
-
(1989)
1989 Symp. on Circuits and Systems
-
-
Safir, A.1
Zavidovique, B.2
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