Automated Josephson Integrated Circuit Test System

IEEE Transactions on Applied Superconductivity

Volumn 3, Issue 1, 1993, Pages 2687-2689

  Burroughs, C J ^a   Hamilton, C A ^a  

^a NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TESTING; INTEGRATED CIRCUIT TESTING; PERSONAL COMPUTERS; SUPERCONDUCTING MATERIALS;

AUTO-CALIBRATION; JOSEPHSON IC; NOISE SUPPRESSION; SUPERCONDUCTIVE IC;

JOSEPHSON JUNCTION DEVICES;

EID: 0027553192     PISSN: 10518223     EISSN: 15582515     Source Type: Journal    
DOI: 10.1109/77.233980     Document Type: Letter

References (4)

1. C.A., Hamilton, High-Speed, Low-Crosstalk Chip Holder for Josephson Integrated Circuits, ” IEEE Trans. Instrum, Meas, IM-31, 129, 131 1982
2. C.A., Hamilton, 100 GHz binary counter based on DC SQUID’s, IEEE Electron Dev. Lett, EDL-3, 335, 338 1982
3. K.K., Likharev, V.K., Semenov, RSFQ/Memory Family: A New Josephson Junction Technology for Sub Terahertz Clock-Frequency Digital Systems, ” IEEE Trans. Appl, Supercon, 1, 3, 28 1991
4. S.P., Benz, C.J., Burroughs, C.A., Hamilton, Experimental results on single flux quantum logic