Computer-Aided Performance Assessment of Fully Depleted SO1 CMOS VLSI Circuits

IEEE Transactions on Electron Devices

Volumn 40, Issue 3, 1993, Pages 598-604

  Fossum, Jerry G ^a   Yeh, Ping Chin ^a   Choi, Jin Young ^a  

^a UNIVERSITY OF FLORIDA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; CMOS INTEGRATED CIRCUITS; COMPUTER AIDED ANALYSIS; DIGITAL INTEGRATED CIRCUITS; MOSFET DEVICES; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MODELS; SILICON ON INSULATOR TECHNOLOGY;

BJT; CMOS VLSI CIRCUITS; FLOATING-BODY DEVICES; SOI MOSFETS; SUBMICROMETER MOSFETS;

VLSI CIRCUITS;

EID: 0027553182     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.199366     Document Type: Article

References (16)

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