Accurate Estimation of Defect-Related Yield Loss in Reconfigurable VLSI Circuits

IEEE Journal of Solid-State Circuits

Volumn 28, Issue 2, 1993, Pages 146-156

  Khare, Jitendra ^a   Feltham, Derek B I ^a   Maly, Wojciech ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CROSSBAR EQUIPMENT; ELECTRIC SWITCHES; INTEGRATED CIRCUIT LAYOUT; RANDOM ACCESS STORAGE;

CROSSBAR SWITCHES; DEFECT-RELATED YIELD LOSSES; LARGE-AREA ICS; RECONFIGURABLE VLSI CIRCUITS; SRAM; YIELD ESTIMATION;

VLSI CIRCUITS;

EID: 0027543659     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.192046     Document Type: Article

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