An Efficient and Simple VLSI Tree Architecture for Motion Estimation Algorithms

IEEE Transactions on Signal Processing

Volumn 41, Issue 2, 1993, Pages 889-900

  Jehng, Yeu Shen ^a   Chen, Liang Gee ^a   Chiueh, Tzi Dar ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; IMAGE PROCESSING; PIPELINE PROCESSING SYSTEMS; VIDEO TELEPHONE EQUIPMENT; VLSI CIRCUITS;

FULL-SEARCH BLOCK-MATCHING ALGORITHM; MOTION ESTIMATION ALGORITHMS; PIPELINE INTERLEAVING; THREE-STEP HIERARCHICAL SEARCH ALGORITHM; VLSI TREE ARCHITECTURE;

MICROPROCESSOR CHIPS;

EID: 0027543616     PISSN: 1053587X     EISSN: 19410476     Source Type: Journal    
DOI: 10.1109/78.193224     Document Type: Article

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