Buffer distribution algorithm for high-speed clock routing

Proceedings - Design Automation Conference

Volumn , Issue , 1993, Pages 537-543

  Cho, Jun Dong ^a   Sarrafzadeh, Majid ^a  

^a NORTHWESTERN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; HIERARCHICAL SYSTEMS; OPTIMIZATION; TIMING CIRCUITS;

BUFFER DISTRIBUTION; CLOCK ROUTING; MULTICHIP MODULES;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 0027316515     PISSN: 01467123     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)