Layout compaction with minimized delay bound on timing critical paths

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 1993, Pages 1849-1852

  Wang, Lih Yang ^a   Lai, Yen Tai ^a   Liu, Bin Da ^a   Chang, Tin Chung ^a  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; COMPUTER PROGRAMMING; GRAPH THEORY;

LAYOUT COMPACTION; MINIMIZED DELAY BOUNDS; TIMING CRITICAL PATHS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0027313781     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)