Non-scan design-for-testability techniques for sequential circuits

Proceedings - Design Automation Conference

Volumn , Issue , 1993, Pages 236-241

  Chickermane, Vivek ^a   Rudnick, Elizabeth ^a   Banerjee, Prithviraj ^a   Patel, Janak H ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TESTING; CONTROL SYSTEMS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT TESTING;

DESIGN FOR TESTABILITY; OPUS-NS TOOL; STUCK AT TESTS;

SEQUENTIAL CIRCUITS;

EID: 0027309690     PISSN: 01467123     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/157485.164686     Document Type: Conference Paper

References (20)