The DASH Prototype: Logic Overhead and Performance

IEEE Transactions on Parallel and Distributed Systems

Volumn 4, Issue 1, 1993, Pages 41-61

  Lenoski, Daniel ^a   Laudon, James ^a   Joe, Truman ^a   Nakahira, David ^a   Stevens, Luis ^a   Gupta, Anoop ^a   Hennessy, John ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

Directory based cache coherence; implementation cost; multiprocessor; parallel architecture; performance analysis; shared memory

Indexed keywords

DIGITAL STORAGE; PERFORMANCE;

CACHE COHERENCE; DASH PROJECT; SHARED MEMORY MULTIPROCESSORS;

MULTIPROCESSING SYSTEMS;

EID: 0027269147     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/71.205652     Document Type: Article

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