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Volumn 41, Issue 1, 1993, Pages 436-

A New Array Architecture for Prime-Length Discrete Cosine Transform

Author keywords

[No Author keywords available]

Indexed keywords

ARRAY ARCHITECTURE; COSINE KERNELS; DISCRETE COSINE TRANFORMS; PRIME-LENGTH DCT; SYSTOLIC ALGORITHMS;

EID: 0027235173     PISSN: 1053587X     EISSN: 19410476     Source Type: Journal    
DOI: 10.1109/TSP.1993.193173     Document Type: Article
Times cited : (51)

References (13)
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    • Chang, L.W.1    Wu, M.C.2
  • 5
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    • Systolic architectures for the computation of the discrete Hartley and the discrete cosine transforms based on prime factor decomposition
    • Nov.
    • C. Chakrabarti and J. Ja'Ja', “Systolic architectures for the computation of the discrete Hartley and the discrete cosine transforms based on prime factor decomposition,” IEEE Trans. Comput., vol. 39, no. 11, pp. 1359–1368, Nov. 1990.
    • (1990) IEEE Trans. Comput. , vol.39 , Issue.11 , pp. 1359-1368
    • Chakrabarti, C.1    Ja'Ja', J.2
  • 6
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    • Oct.
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    • (1990) IEEE Trans. Circuits Syst. , vol.37 , Issue.10 , pp. 1321-1323
    • Lee, M.H.1
  • 8
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    • A. L. Fisher and H. T. Kung, “Special-purpose VLSI architectures: general discussions and a case study,” in VLSI and Modern Signal Processing.” S. Y. Kung et al., Eds. Englewood Cliffs, NJ: Prentice-Hall, 1985, Chapter 8, pp. 154–169.
    • (1985) VLSI and Modern Signal Processing , pp. 154-169
    • Fisher, A.L.1    Kung, H.T.2
  • 9
    • 0026283306 scopus 로고
    • A new systolic array algorithm for discrete Fourier transform
    • submitted for publication, also in Proc. Int. Symp. on Circuits and Systems Singapore 1991
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    • Liu, C.M.1    Jen, C.W.2
  • 10
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.