Circuit simulation models for MOS-gated power devices. Application to the simulation of an electronic lamp ballast circuit

Conference Procedings - IEEE Applied Power Electronics Conference and Exposition - APEC

Volumn , Issue , 1993, Pages 498-503

  Andersson, M ^a   Kuivalainen, P ^a   Pohjonen, H ^a  

^a Semiconductor Lab ^*  (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; COMPUTER SIMULATION; MONOLITHIC INTEGRATED CIRCUITS; MOS DEVICES;

BIPOLAR DRIVERS; DMOS DRIVERS; DMOS TRANSISTORS; ELECTRONIC LAMP BALLAST CIRCUITS; IGBT; MOS-GATED POWER DEVICES;

BALLASTS (LAMP);

EID: 0027224868     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)