High throughput-rate architecture for 8*8 2-D DCT

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 1993, Pages 1587-1590

  Sheu, Ming Hwa ^a   Lee, Jau Yien ^a   Wang, Jhing Fa ^a   Suen, An Nan ^a   Liu, Liang Ying ^a  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; MATHEMATICAL TRANSFORMATIONS; TABLE LOOKUP;

DISCRETE COSINE TRANSFORMS; HIGH THROUGHPUT-RATE ARCHITECTURE;

VLSI CIRCUITS;

EID: 0027224312     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)