Efficient method of partitioning circuits for multiple FPGA implementation

Proceedings - Design Automation Conference

Volumn , Issue , 1993, Pages 202-207

  Woo, Nam Sung ^a   Kim, Jaeseok ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS; MAPPING; NUMERICAL ANALYSIS;

FIELD PROGRAMMABLE GATE ARRAYS; PARTITIONING CIRCUITS;

LOGIC GATES;

EID: 0027188885     PISSN: 01467123     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/157485.164669     Document Type: Conference Paper

References (14)