Stable calculation for power device simulation with inductive load circuit: application of an integral method

Microelectronics Journal

Volumn 24, Issue 1-2, 1993, Pages 139-145

  Iwamuro, Noriyuki ^a   Tagami, Saburo ^a  

^a FUJI ELECTRIC CO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; ELECTRIC LOADS; SEMICONDUCTOR DEVICE MODELS; THYRISTORS;

INDUCTIVE LOAD CIRCUITS; INTEGRAL METHODS; POWER SEMICONDUCTOR DEVICES;

SEMICONDUCTOR DEVICES;

EID: 0027188090     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/0026-2692(93)90108-Q     Document Type: Article

References (10)

1. Onset of current filamentation in GTO devices
2. c taking into account external circuit
3. Improved 600- and 1200-VIGBT with low turn-off loss and high ruggedness
4. Inductive switching simulation of power devices
5. Two dimensional simulation of power devices with circuit boundary condition
6. Fundamental modeling of the turn-off behaviour of power bipolar transistor
7. Two-dimensional turn-off process simulation of a GTO with realistic RLC load
8. Numerical analysis of short-circuit safe operating area for p-channel and n-channel IGBTs
9. Application of an integral calculation method to the external circuit equation in two-dimensional device simulator