-
1
-
-
0019612769
-
The prospects for multivalued logic: A technology and application view
-
K. C. Smith, “The prospects for multivalued logic: A technology and application view,” IEEE Trans. Comput., vol. C-30, pp. 619–634, 1981.
-
(1981)
IEEE Trans. Comput.
, vol.C-30
, pp. 619-634
-
-
Smith, K.C.1
-
2
-
-
84901424787
-
Engineering aspects of multiple-valued logic system
-
1974 Sept.
-
Z. G. Vranesic and K. C. Smith, “Engineering aspects of multiple-valued logic system,” IEEE Comput. Mag., vol. 7, pp. 34–41, Sept. 1974.
-
(1974)
IEEE Comput. Mag.
, vol.7
, pp. 34-41
-
-
Vranesic, Z.G.1
Smith, K.C.2
-
3
-
-
0022665606
-
Characteristics of prototype CMOS quaternary logic encoder-decoder circuits
-
1986 Feb.
-
T. L. Margin and K. W. Current, “Characteristics of prototype CMOS quaternary logic encoder-decoder circuits,” IEEE Trans. Comput., vol. C-35, pp. 157–161, Feb. 1986.
-
(1986)
IEEE Trans. Comput.
, vol.C-35
, pp. 157-161
-
-
Margin, T.L.1
Current, K.W.2
-
4
-
-
0024750508
-
Quantum functional devices: Resonant-tunneling transistors, circuits with reduced complexity, and multiple-valued logic
-
1989 Oct.
-
F. Capasso, S. Sen, F. Beltram, L. M. Lunardi, A. S. Vengurlekar, P. R. Smith, N.J. Shah, R.J. Malik, and A. Y. Cho, “Quantum functional devices: Resonant-tunneling transistors, circuits with reduced complexity, and multiple-valued logic,” IEEE Trans. Electron Devices, vol. 36, no. 10, pp. 2065–2082, Oct. 1989.
-
(1989)
IEEE Trans. Electron Devices
, vol.36
, Issue.10
, pp. 2065-2082
-
-
Capasso, F.1
Sen, S.2
Beltram, F.3
Lunardi, L.M.4
Vengurlekar, A.S.5
Smith, P.R.6
Shah, N.J.7
Malik, R.J.8
Cho, A.Y.9
-
5
-
-
36549101008
-
Three and six logic states by the vertical integration of InAlAs/InGaAs resonant tunneling structures
-
R. C. Potter, A. A. Lakhani, and H. Hier, “Three and six logic states by the vertical integration of InAlAs/InGaAs resonant tunneling structures,” J. Appl. Phys., vol. 64, p. 3735, 1988.
-
(1988)
J. Appl. Phys.
, vol.64
, pp. 3735
-
-
Potter, R.C.1
Lakhani, A.A.2
Hier, H.3
-
6
-
-
0026103955
-
A/D converter using InGaAs/InA1As resonant-tunneling diodes
-
1991 Feb.
-
T. H. Kuo, H. C. Lin, R. C. Potter, and D. Shupe, “A/D converter using InGaAs/InA1As resonant-tunneling diodes,” IEEE J. Solid-State Circuits, vol. 26, no. 2, pp. 145–149, Feb. 1991.
-
(1991)
IEEE J. Solid-State Circuits
, vol.26
, Issue.2
, pp. 145-149
-
-
Kuo, T.H.1
Lin, H.C.2
Potter, R.C.3
Shupe, D.4
-
7
-
-
0344433760
-
Monolithic integration of GaAs/AlGaAs resonant tunnel diode load and GaAs enhancement-mode MESFET drivers for tunnel diode FET logic gates
-
Atlanta, GA
-
K. L. Lear, K. Yoh, and J. S. Harris, Jr., “Monolithic integration of GaAs/AlGaAs resonant tunnel diode load and GaAs enhancement-mode MESFET drivers for tunnel diode FET logic gates,” in Proc. Int. Symp. GaAs and Related Compounds, Atlanta, GA, 1988.
-
(1988)
Proc. Int. Symp. GaAs and Related Compounds
-
-
Lear, K.L.1
Yoh, K.2
Harris, J.S.3
-
8
-
-
0024870479
-
Large-signal resonant-tunneling diode model for SPICE3 simulation
-
1989 pp Dec.
-
T. H. Kuo, H. C. Lin, U. Anandakrishnan, R. C. Potter, and D. Shupe, “Large-signal resonant-tunneling diode model for SPICE3 simulation,” in 1989 IEEE IEDM Tech. Dig., Dec. 1989, pp. 567–570.
-
(1989)
1989 IEEE IEDM Tech. Dig.
, pp. 567-570
-
-
Kuo, T.H.1
Lin, H.C.2
Anandakrishnan, U.3
Potter, R.C.4
Shupe, D.5
-
9
-
-
33845704663
-
Heterojunction double-barrier diodes for logic applications
-
H. C. Liu and D. D. Coon, “Heterojunction double-barrier diodes for logic applications,” Appl. Phys. Lett., vol. 50, p. 1246, 1987.
-
(1987)
Appl. Phys. Lett.
, vol.50
, pp. 1246
-
-
Liu, H.C.1
Coon, D.D.2
-
11
-
-
84941496798
-
A vertically integrated resonant tunneling device with multiple negative differential resistances
-
Boulder, CO
-
R. C. Potter et al., “A vertically integrated resonant tunneling device with multiple negative differential resistances,” in Proc. Device Research Conf, Boulder, CO, 1988.
-
(1988)
Proc. Device Research Conf
-
-
Potter, R.C.1
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