A systematic approach for designing testable VLSI circuits

1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers

Volumn , Issue , 1992, Pages 496-499

  Lin, Sen Pin ^a   Njinda, Charles A ^a   Breuer, Melvin A ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED LOGIC DESIGN;

BUILT-IN SELF-TEST (BIST); HIGH-LEVEL SYNTHESIS;

VLSI CIRCUITS;

EID: 0027047762     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)