Performance directed synthesis for table look up programmable gate arrays

1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers

Volumn , Issue , 1992, Pages 572-575

  Murgai, Rajeev ^a   Shenoy, Narendra ^a   Brayton, Robert K ^a   Sangiovanni Vincentelli, Alberto ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED LOGIC DESIGN; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION;

BENCHMARKS; LOGIC SYNTHESIS; PROGRAMMABLE GATE ARRAYS;

LOGIC GATES;

EID: 0027045290     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)