Efficient superscaler performance through boosting

International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS

Volumn 27, Issue 9, 1992, Pages 248-259

  Smith, Michael D ^a   Horowitz, Mark ^a   Lam, Monica S ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER SOFTWARE; COMPUTER SYSTEMS; DESIGN; PARALLEL PROCESSING SYSTEMS; PERFORMANCE; PROGRAM COMPILERS; REDUCED INSTRUCTION SET COMPUTING; SCHEDULING;

BOOSTING; DYNAMICALLY-SCHEDULED SUPERSCALAR PROCESSORS; INSTRUCTION LEVEL PARALLELISM; SPECULATIVE EXECUTION; SUPERSCALAR PROCESSORS; BOOSTING LEVELS; DYNAMICALLY-SCHEDULED PROCESSORS; INSTRUCTION-LEVEL PARALLELISM (ILP); STATICALLY-SCHEDULED PROCESSORS; SUPERSCALAR PROCESSOR DESIGN;

COMPUTER ARCHITECTURE; MICROPROCESSOR CHIPS;

EID: 0027028425     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (29)