메뉴 건너뛰기




Volumn 13, Issue 12, 1992, Pages 636-638

The Inverse-Narrow-Width Effect of LOCOS Isolated n-MOSFET in a High-Concentration p-Well

Author keywords

[No Author keywords available]

Indexed keywords

BORON; COMPUTER SIMULATION;

EID: 0027005601     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/55.192869     Document Type: Article
Times cited : (7)

References (8)
  • 1
    • 0024170748 scopus 로고
    • A 0.5 μm isolation technology using advanced poly silicon pad LOCOS (APPL)
    • T. Nishihara, K. Tokunaga, and K. Kobayashi, “A 0.5 μm isolation technology using advanced poly silicon pad LOCOS (APPL),” in IEDM Tech. Dig., 1988, pp. 100–103.
    • (1988) IEDM Tech. Dig. , pp. 100-103
    • Nishihara, T.1    Tokunaga, K.2    Kobayashi, K.3
  • 2
    • 0022668994 scopus 로고
    • A bird's beak reduction technique for LOCOS in VLSI fabrication
    • Feb.
    • H.H. Tsai, C.L. Yu, and C.Y. Wu, “A bird's beak reduction technique for LOCOS in VLSI fabrication,” IEEE Electron Device Lett., vol. EDL-7, no. 2, pp. 122–123, Feb. 1986.
    • (1986) IEEE Electron Device Lett. , vol.7 EDL , Issue.2 , pp. 122-123
    • Tsai, H.H.1    Yu, C.L.2    Wu, C.Y.3
  • 3
    • 0025433461 scopus 로고
    • Width-independent narrow nMOSFET reliability by split-well drive-in
    • May
    • C. Mazuré, A. Lill, and Ch. Zeller, “Width-independent narrow nMOSFET reliability by split-well drive-in,” IEEE Electron Device Lett., vol. 11, no. 5, pp. 224–226, May 1990.
    • (1990) IEEE Electron Device Lett. , vol.11 , Issue.5 , pp. 224-226
    • Mazuré, C.1    Lill, A.2    Zeller, C.3
  • 4
    • 0023254467 scopus 로고
    • SMART: Three-dimensional process/device simulator integrated on a supercomputer
    • S. Odanaka et al., “SMART: Three-dimensional process/device simulator integrated on a supercomputer,” in ISCAS Proc., vol. 2, 1987, pp. 534–537.
    • (1987) ISCAS Proc. , vol.2 , pp. 534-537
    • Odanaka, S.1
  • 5
    • 0024034042 scopus 로고
    • SMART-P: Rigourous three-dimensional process simulator on a supercomputer
    • June
    • S. Odanaka, H. Umimoto, M. Wakabayashi, and H. Esaki, “SMART-P: Rigourous three-dimensional process simulator on a supercomputer,” IEEE Trans. Computer-Aided Design, vol. 7, no. 6, pp. 675–683, June 1988.
    • (1988) IEEE Trans. Computer-Aided Design , vol.7 , Issue.6 , pp. 675-683
    • Odanaka, S.1    Umimoto, H.2    Wakabayashi, M.3    Esaki, H.4
  • 6
    • 0024681606 scopus 로고
    • Numerical modeling of nonplanar oxidation coupled with stress effects
    • June
    • H. Umimoto, S. Odanaka, I. Nakao, and H. Esaki, “Numerical modeling of nonplanar oxidation coupled with stress effects,” IEEE Trans. Computer-Aided Design, vol. 8, no. 6, pp. 599–606, June 1989.
    • (1989) IEEE Trans. Computer-Aided Design , vol.8 , Issue.6 , pp. 599-606
    • Umimoto, H.1    Odanaka, S.2    Nakao, I.3    Esaki, H.4
  • 7
    • 0041433136 scopus 로고
    • Analysis of an anomalous subthreshold current in a fully recessed oxide MOSFET using a three-dimensional device simulator
    • Feb.
    • N. Shigyo and R.L.M. Dang, “Analysis of an anomalous subthreshold current in a fully recessed oxide MOSFET using a three-dimensional device simulator,” IEEE Trans. Electron Devices, vol. ED-32, no. 2, pp. 441–445, Feb. 1985.
    • (1985) IEEE Trans. Electron Devices , vol.32 ED , Issue.2 , pp. 441-445
    • Shigyo, N.1    Dang, R.L.M.2
  • 8
    • 0024682379 scopus 로고
    • Narrow-width effects of shallow trench-isolated CMOS with n+-polycilicon gate
    • June
    • K. Ohe, S. Odanaka, K. Moriyama, T. Hori, and G. Fuse, “Narrow-width effects of shallow trench-isolated CMOS with n+-polycilicon gate,” IEEE Trans. Electron Devices, vol. 36, no. 6, pp. 224–226, June 1989.
    • (1989) IEEE Trans. Electron Devices , vol.36 , Issue.6 , pp. 224-226
    • Ohe, K.1    Odanaka, S.2    Moriyama, K.3    Hori, T.4    Fuse, G.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.