HYPER-LP: A system for power minimization using architectural transformations

IEEE/ACM International Conference on Computer-Aided Design

Volumn , Issue , 1992, Pages 300-303

  Chandrakasan, Anantha P ^a   Potkonjak, Miodrag ^a   Rabaey, Jan ^a   Brodersen, Robert W ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTER AIDED DESIGN; COMPUTER ARCHITECTURE; DATABASE SYSTEMS; ELECTRIC CURRENTS; ELECTRIC LOSSES; ELECTRIC NETWORK SYNTHESIS; HEURISTIC METHODS; POWER CONTROL; VLSI CIRCUITS;

ARCHITECTURAL TRANSFORMATIONS; HIGH LEVEL SYNTHESIS SYSTEM HYPER-LP; POWER MINIMIZATION;

CMOS INTEGRATED CIRCUITS;

EID: 0027002268     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iccad.1992.279357     Document Type: Conference Paper

References (12)