3 V operation of 70 nm gate length MOSFET with new double punchthrough stopper structure

Conference on Solid State Devices and Materials

Volumn , Issue , 1992, Pages 490-492

  Hashimoto, Takeshi ^a   Sudoh, Yoshim ^a   Kurino, Hiroyuki ^a   Narai, Akira ^a   Yokoyama, Shin ^a   Horuke, Yasuhiro ^a   Koyanagil, Mitsumasa ^a  

^a HIROSHIMA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC PROPERTIES; GATES (TRANSISTOR); SUBSTRATES;

PUNCHTHROUGH STOPPER STRUCTURES;

MOSFET DEVICES;

EID: 0026994246     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)