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Volumn , Issue , 1992, Pages 165-172
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Delay fault models and test generation for random logic sequential circuits
a
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Author keywords
[No Author keywords available]
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Indexed keywords
COMBINATORIAL MATHEMATICS;
FLIP FLOP CIRCUITS;
SENSITIVITY ANALYSIS;
SET THEORY;
FAULT MODELS;
TEST GENERATION;
SEQUENTIAL CIRCUITS;
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EID: 0026986184
PISSN: 01467123
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (49)
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References (25)
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