Register traffic analysis for streamlining inter-operation communication in fine-grain parallel processors

Proceedings of the 25th Annual International Symposium on Microarchitecture

Volumn , Issue , 1992, Pages 236-245

  Franklin, Mano ^a   Sohi, Gurindar S ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION;

FINE GRAIN PARALLEL PROCESSORS; MICROARCHITECTURE; REGISTER TRAFFIC ANALYSIS INTER OPERATION COMMUNICATION;

PARALLEL PROCESSING SYSTEMS;

EID: 0026984988     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/144965.145818     Document Type: Conference Paper

References (19)