Unified signal transition graph model for asynchronous control circuit synthesis

IEEE/ACM International Conference on Computer-Aided Design

Volumn , Issue , 1992, Pages 104-111

  Yakovlev, Alexandre ^a   Lavagno, Luciano ^a   Sangiovanni Vincentelli, Alberto ^a  

^a NEWCASTLE UNIVERSITY   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; CHARACTERIZATION; COMPUTER AIDED DESIGN; DELAY CIRCUITS; DIGITAL CIRCUITS; EQUIVALENCE CLASSES; GRAPH THEORY; HAZARDS AND RACE CONDITIONS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; PETRI NETS;

ASYNCHRONOUS CONTROL CIRCUIT SYNTHESIS; FORMAL CIRCUIT SPECIFICATION; HIGH LEVEL (SPECIFICATION ORIENTED) MODELS; LOW LEVEL (ANALYSIS ORIENTED) MODELS; SIGNAL TRANSITION GRAPHS (STGS);

VLSI CIRCUITS;

EID: 0026976855     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)