Avoiding Unconditional Jumps by Code Replication

ACM SIGPLAN Notices

Volumn 27, Issue 7, 1992, Pages 322-330

  Mueller, Frank ^a   Whalley, David B ^a  

^a FLORIDA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

PROGRAM COMPILERS;

CODE REPLICATION METHOD; UNCONDITIONAL JUMPS;

COMPUTER PROGRAMMING;

EID: 0026972781     PISSN: 03621340     EISSN: 15581160     Source Type: Journal    
DOI: 10.1145/143103.143144     Document Type: Article

References (13)

1. M. E. Benitez, J. W. Davidson A Portable Global Optimizer and Linker, Proceedings of the SIGPLAN ‘88 Symposium on Programming Language Design and Implementation, Atlanta, GA, June 1988, pp. 329-338
2. D, W. Clark, H. M. Levy, Measurement and Analysis of Instruction Use in the VAX-11/780, Proceedings of the 9th Annual Symposium on Computer Architecture, April 1982, pp. 9-17
3. J. W. Davidson, A. M. Holler, A Study of a C Function Inliner, Software, Vol. 18, No. 8, August 1988, pp. 775-790
4. J. W. Davidson, D. B. Whalley, Quick Compilers Using Peephole Optimizations, Software - Practice and Experience, Vol. 19, No. 1, January 1989, pp. 195-203
5. J. W. Davidson, D. B. Whalley, Ease: An Environment for Architecture Study and Experimentation, Proceedings of the SIGMETRICS 1990 Conference on Measurement and Modeling of Computer Systems, May 1990, pp. 259-260
6. R. W. Floyd, Algorithm 97: Shortest Path, Communications of the ACM, Vol. 5, No. 6, June 1962, p. 345
7. M. C. Golumbic, V. Rainish, Instruction Scheduling beyond Basic Blocks, IBM Journal of Research Development, Vol. 34, No. 1, January 1990, pp. 93-97
8. J. L. Hennessy, D. A. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kaufmann, 1990
9. W. W. Hwu, P. P. Chang, Inlining Function Expansion for Compiling C Programs, Proceedings of the ACM SIGPLAN 1989 Conference on Programming Language Design and Implementation, Vol. 24, No. 5, June 1989, pp. 246-257
10. B. L. Peuto, L. J. Shustek, An Instruction Timing Model of CPU Performance, Proceedings of the 4th Annual Symposium on Computer Architecture, March 1977, pp. 165-178
11. E. M. Riseman, C. C. Foster, The Inhibition of Potential Parallelism by Conditional Jumps, IEEE Transactions on Computers, Vol. 21, No. 12, December 1972, pp. 1405-1411
12. A. J. Smith, Cache Memories, Computing Surveys, Vol. 14, No. 3, September 1982, pp. 473-530
13. S. Warshall, A Theorem on Boolean Matrices, Journal of the ACM, No. 9, 1962, pp. 11-12