System-level routing of mixed-signal ASICs in WREN

IEEE/ACM International Conference on Computer-Aided Design

Volumn , Issue , 1992, Pages 394-399

  Mitra, Sujoy ^a   Nag, Sudip K ^a   Rutenbar, Rob A ^a   Carley, L Richard ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONSTRAINT THEORY; CRITICAL PATH ANALYSIS; ELECTRIC NETWORK SYNTHESIS; LINEAR INTEGRATED CIRCUITS; MATHEMATICAL MODELS; OPTIMIZATION; SIGNAL PROCESSING;

AGGRESSIVE SIMULATED ANNEALING FORMULATION; APPLICATION SPECIFIC INTEGRATED CIRCUITS (ASIC); MACROCELL STYLE ANALOG CORE; MIXED SIGNAL; SIGNAL INTEGRITY CONSTRAINTS; SYSTEM LEVEL ROUTING;

INTEGRATED CIRCUIT LAYOUT;

EID: 0026966663     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iccad.1992.279339     Document Type: Conference Paper

References (18)