Locating logic design errors via test generation and don't-care propagation

European Design Automation Conference

Volumn , Issue , 1992, Pages 466-471

  Kuo, Sy Yen ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMBINATORIAL CIRCUITS; COMPUTER AIDED LOGIC DESIGN; ERROR DETECTION; LOGIC CIRCUITS; LOGIC GATES; SWITCHING THEORY; VLSI CIRCUITS;

DON'T CARE PROPAGATION; FUNCTIONAL LEVEL SPECIFICATION; GATE LEVEL CIRCUIT IMPLEMENTATION; LOGIC VERIFICATION; TEST GENERATION;

LOGIC DESIGN;

EID: 0026962074     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)