High-level synthesis with pin constraints for multiple-chip designs

Proceedings - Design Automation Conference

Volumn , Issue , 1992, Pages 231-234

  Hung, Yung Hua ^a   Parker, Alice C ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONTROL SYSTEM SYNTHESIS; HEURISTIC PROGRAMMING; SCHEDULING;

DATA-PATH SYNTHESIS; MULTIPLE CHIP DESIGN; PARTITIONED BEHAVIORAL-LEVEL DESCRIPTION;

DIGITAL CIRCUITS;

EID: 0026960888     PISSN: 01467123     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)