Characterization of Charge Trapping in Submicrometer NMOSFET’s by Gate Capacitance Measurements

IEEE Electron Device Letters

Volumn 13, Issue 11, 1992, Pages 587-589

  Ling, C H ^a   Ah, L K ^a   Yeow, Y T ^b  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^b UNIVERSITY OF QUEENSLAND   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

BAND STRUCTURE; CAPACITANCE MEASUREMENT; CHARGE CARRIERS;

CHANNEL SHORTENING; CHARGE TRAPPING; ELECTRON TRAPPING HOLE TRAPPING; GATE CAPACITANCEW MEASUREMENT; SUBMICROMETER NMOSFET;

MOSFET DEVICES;

EID: 0026955620     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/55.192848     Document Type: Article

References (15)

1. Y. T. Yeow, C. H. Ling, and L. K. Ah, “Observation of MOSFET degradation due to electrical stressing through gate-to-source and gate-to-drain capacitance measurement,” IEEE Electron Device Lett., vol. 12, pp. 366-368, 1991.
2. E. Takeda, Y. Nakagome, H. Kume, and S. Asai, “New hot-carrier injection and device degradation in submicron MOSFETs,” Proc. Inst. Elec. Eng., vol. 130, pt. I, pp. 144-150, 1983.
3. E. Takeda, Y. Nakagome, H. Kume, N. Suzuki, and S. Asai, “Comparison of characteristics of n-channel and p-channel MOSFET’s for VLSI’s,” IEEE Trans. Electron Devices, vol. ED-30, pp. 675-680, 1983.
4. B. Borchert, K. R. Hofmann, and G. Dorda, “Positive and negative charge generation by hot carriers in NMOSFETs,” Electron. Lett., vol. 19, pp. 746-747, 1983.
5. K. R. Hofmann, C. Werner, W. Weber, and G. Dorda, “Hot-electron and hole-emission effects in short n-channel MOSFET’s,” IEEE Trans. Electron Devices, vol. ED-32, pp. 691-699, 1985.
6. H. Iwai, M. R. Pinto, C. S. Rafferty, J. E. Oristian, and R. W. Dutton, “Velocity saturation effect on short-channel MOS transistor capacitance” IEEE Electron Device Lett., vol. EDL-6, pp. 120-122, 1985.
7. N. M. Johnson et. al., “Characteristic electronic defects at the Si-SiO2 interface,” Appl. Phys. Lett., vol. 43, pp. 563-565, 1983.
8. N. S. Saks et. al., “Observation of hot-hole injection in NMOS transistors using a modified floating-gate technique,” IEEE Trans. Electron Devices, vol. ED-33, pp. 1529-1533, 1986.
9. P. Heremans, R. Bellens, G. Groeseneken, and H. E. Maes, “Consistent model for the hot-carrier degradation in n-channel and p-channel MOSFET’s,” IEEE Trans. Electron Devices, vol. 35, pp. 2194-2209, 1988.
10. I. C. Chen, J. Y. Choi, T. Y. Chan, and C. Hu, “The effect of channel hot-carrier stressing on gate-oxide integrity in MOSFET’s,” IEEE Trans. Electron Devices, vol. 35, pp. 2253-2258, 1988.
11. B. S. Doyle et. al., “The generation and characterisation of electron and hole traps created by hole injection during low gate voltage hot-carrier stressing in n-mos transistors,” IEEE Trans. Electron Devices, vol. 37, pp. 1869-1876, 1990.
12. A. Schwerin, W. Hansch, and W. Weber, “The relationship between oxide charge and device degradation: A comparative study of n-channel and p-channel MOSFET’s,” IEEE Trans. Electron Devices, vol. ED-34, pp. 2493-2500, 1987.
13. R. Woltjer and G. M. Paulzen, “A new monitor to predict hot-carrier damage of PMOS transistors,” in IEDM Tech. Dig., 1990, pp. 561-564.
14. Q. Wang, M. Brox, W. H. Krautschneider, and W. Weber, “Ex-planation and model for the logarithmic time dependence of p-MOSFET degradation,” IEEE Electron Device Lett., vol. 12, pp. 218-220, 1991.
15. Y. T. Yeow, “Measurement and numerical modeling of short-channel MOSFET gate capacitances,” IEEE Trans. Electron Devices, vol. ED-34, pp. 2510-2520, 1987.