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Volumn 41, Issue 10, 1992, Pages 1344-1348

Self Synchronized Asynchronous Sequential Pass Transistor Circuits

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; TRANSISTORS; VLSI CIRCUITS;

EID: 0026939853     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.166614     Document Type: Article
Times cited : (3)

References (9)
  • 1
    • 0015078316 scopus 로고
    • A state assignment procedure for asynchronous sequential circuits
    • June
    • G. Maki and J. Tracey, “A state assignment procedure for asynchronous sequential circuits,” IEEE Trans. Comput., vol. C-20, pp. 666–668, June 1971.
    • (1971) IEEE Trans. Comput. , vol.C-20 , pp. 666-668
    • Maki, G.1    Tracey, J.2
  • 2
    • 1842763479 scopus 로고
    • Internal state assignments for asynchronous sequential machines
    • Aug.
    • J. Tracey, “Internal state assignments for asynchronous sequential machines,” IEEE Trans. Electron. Comput., vol. EC-15, pp. 551–560, Aug. 1966.
    • (1966) IEEE Trans. Electron. Comput. , vol.EC-15 , pp. 551-560
    • Tracey, J.1
  • 3
    • 0016080115 scopus 로고
    • Fault tolerant asynchronous sequential machines
    • July
    • G. Maki and D. Sawin, “Fault tolerant asynchronous sequential machines,” IEEE Trans. Comput., vol. C-23, pp. 651–657, July 1974.
    • (1974) IEEE Trans. Comput. , vol.C-23 , pp. 651-657
    • Maki, G.1    Sawin, D.2
  • 4
    • 84941444858 scopus 로고
    • Implications of Tracey's Theorem to asynchronous sequential circuit design
    • Nov.
    • S. Golpalakrishnan, G. Kim, and G. Maki, “Implications of Tracey's Theorem to asynchronous sequential circuit design,” in Proc. NASA Symp. VLSI Design, Nov. 1990, pp. 9.1.1-9.1.11.
    • (1990) Proc. NASA Symp. VLSI Design , pp. 9.1.1-9.1.11
    • Golpalakrishnan, S.1    Kim, G.2    Maki, G.3
  • 5
    • 0024611086 scopus 로고
    • Pass transistor asynchronous sequential circuits
    • Feb.
    • S. Whitaker and G. Maki, “Pass transistor asynchronous sequential circuits,” IEEE J. Solid State Circuits, vol. SC-24, pp. 71–78, Feb. 1989.
    • (1989) IEEE J. Solid State Circuits , vol.SC-24 , pp. 71-78
    • Whitaker, S.1    Maki, G.2
  • 6
    • 0015757538 scopus 로고
    • Synthesis of multiple input change asynchronous machines using controlled excitation and flip-flops
    • Dec.
    • H. Chuang and S. Das, “Synthesis of multiple input change asynchronous machines using controlled excitation and flip-flops,” IEEE Trans. Comput., vol. C-22, pp. 1103–1109, Dec. 1973.
    • (1973) IEEE Trans. Comput. , vol.C-22 , pp. 1103-1109
    • Chuang, H.1    Das, S.2
  • 7
    • 0016963458 scopus 로고
    • Fail safe asynchronous machines with multiple input changes
    • June
    • H. Chuang, “Fail safe asynchronous machines with multiple input changes,” IEEE Trans. Comput., vol. C-25, pp. 637–642, June 1976.
    • (1976) IEEE Trans. Comput. , vol.C-25 , pp. 637-642
    • Chuang, H.1
  • 9
    • 0020310934 scopus 로고
    • Direct implementation of asynchronous control units
    • Dec.
    • L. Hollaar, “Direct implementation of asynchronous control units,” IEEE Trans. Comput., vol. C-31, pp. 1133–1141, Dec. 1982.
    • (1982) IEEE Trans. Comput. , vol.C-31 , pp. 1133-1141
    • Hollaar, L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.