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Volumn 27, Issue 9, 1992, Pages 1299-1302

General-Purpose Neural Chips with Electrically Programmable Synapses and Gain-Adjustable Neurons

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE; COMPUTER CIRCUITS; DATA STORAGE EQUIPMENT; INTEGRATED CIRCUITS;

EID: 0026925756     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.149421     Document Type: Article
Times cited : (14)

References (11)
  • 1
    • 0023984443 scopus 로고
    • Neural-computing: Picking the human brain
    • Mar.
    • R. H. Nielsen, “Neural-computing: Picking the human brain.” IEEE Spectrum, vol. 25, no. 3, pp. 36–41, Mar. 1988.
    • (1988) IEEE Spectrum , vol.25 , Issue.3 , pp. 36-41
    • Nielsen, R.H.1
  • 2
    • 0024888743 scopus 로고
    • VLSI architectures for neural networks
    • Dec.
    • P. Treleaven, M. Pacheco, and M. Vellasco, “VLSI architectures for neural networks,” IEEE Micro Mag., vol. 9, no. 6, pp. 8–27, Dec. 1989.
    • (1989) IEEE Micro Mag. , vol.9 , Issue.6 , pp. 8-27
    • Treleaven, P.1    Pacheco, M.2    Vellasco, M.3
  • 3
    • 0025746730 scopus 로고
    • Hardware annealing in electronic neural networks
    • Jan.
    • B. W. Lee and B. J. Sheu, “Hardware annealing in electronic neural networks,” IEEE Trans. Circuits Syst., vol. 38, no. 1, pp. 134–137, Jan. 1991.
    • (1991) IEEE Trans. Circuits Syst. , vol.38 , Issue.1 , pp. 134-137
    • Lee, B.W.1    Sheu, B.J.2
  • 4
    • 84909706638 scopus 로고    scopus 로고
    • Parallel Distributed Processing, vol. 1, Foundations
    • Cambridge, MA: M.I.T. Press, ch. 7
    • D. E. Rumelhart and J. L. McClelland, Parallel Distributed Processing, vol. 1, Foundations. Cambridge, MA: M.I.T. Press, 1987, ch. 7.
    • Rumelhart, D.E.1    McClelland, J.L.2
  • 6
    • 0024930783 scopus 로고
    • VLSI technologies for artificial neural networks
    • Dec.
    • K. Goser, U. Hilleringmann, U. Rueckert, and K. Schumacher, “VLSI technologies for artificial neural networks,” IEEE Micro Mag., vol. 9, no. 6, pp. 28–44, Dec. 1989.
    • (1989) IEEE Micro Mag. , vol.9 , Issue.6 , pp. 28-44
    • Goser, K.1    Hilleringmann, U.2    Rueckert, U.3    Schumacher, K.4
  • 7
    • 0024909727 scopus 로고
    • An electrically trainable artificial neural network (ETANN) with 10240 ‘float gate’ synapses
    • (Washington, DC), June
    • M. Holler, S. Tam, H. Castro, and R. Benson, “An electrically trainable artificial neural network (ETANN) with 10240 ' ‘float gate’ synapses,” in Proc. IEEE/INNS Int. Joint Conf. Neural Networks, vol. 2 (Washington, DC), June 1989, pp. 191–196.
    • (1989) Proc. IEEE/INNS Int. Joint Conf. Neural Networks , vol.2 , pp. 191-196
    • Holler, M.1    Tam, S.2    Castro, H.3    Benson, R.4
  • 9
    • 0024719704 scopus 로고
    • Design of a neural-based A/D converter using modified Hopfield network
    • Aug.
    • B. W. Lee and B. J. Sheu, “Design of a neural-based A/D converter using modified Hopfield network,” IEEE J. Solid-State Circuits, vol. 24, no. 4, pp. 1129–1135, Aug. 1989.
    • (1989) IEEE J. Solid-State Circuits , vol.24 , Issue.4 , pp. 1129-1135
    • Lee, B.W.1    Sheu, B.J.2
  • 11
    • 0023401686 scopus 로고
    • BSIM: Berkeley short-channel IGFET model for MOS transistors
    • Aug.
    • B. J. Sheu, D. L. Scharfetter, P. K. Ko, and M.-C. Jeng, “BSIM: Berkeley short-channel IGFET model for MOS transistors,” IEEE J. Solid-State Circuits, vol. SC-23, no. 4, pp. 458–466, Aug. 1987.
    • (1987) IEEE J. Solid-State Circuits , vol.SC-23 , Issue.4 , pp. 458-466
    • Sheu, B.J.1    Scharfetter, D.L.2    Ko, P.K.3    Jeng, M.-C.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.