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Volumn 41, Issue 9, 1992, Pages 1181-1184

ELM—A Fast Addition Algorithm Discovered by a Program

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; LOGIC DESIGN; TREES (MATHEMATICS); VLSI CIRCUITS;

EID: 0026923645     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.165399     Document Type: Article
Times cited : (26)

References (11)
  • 1
    • 0020102009 scopus 로고
    • A regular layout for parallel adders
    • Mar.
    • R. P. Brent and H. T. Kung, “A regular layout for parallel adders,” IEEE Trans. Comput., vol. C-31, pp. 260–264, Mar. 1982.
    • (1982) IEEE Trans. Comput. , vol.C-31 , pp. 260-264
    • Brent, R.P.1    Kung, H.T.2
  • 2
    • 0025430517 scopus 로고
    • Area-time optimal adder design
    • May
    • B. W. Y. Wei and C. D. Thompson, “Area-time optimal adder design,” IEEE Trans. Comput., vol. 39, pp. 666–675, May 1990.
    • (1990) IEEE Trans. Comput. , vol.39 , pp. 666-675
    • Wei, B.W.Y.1    Thompson, C.D.2
  • 3
    • 84941472761 scopus 로고
    • Mesh arrays and LOGICIAN: A tool for their efficient generation
    • Nov.
    • J. Beekman, R. M. Owens, and M. J. Irwin, “Mesh arrays and LOGICIAN: A tool for their efficient generation,” in Proc. ICCAD-85, Nov. 1985, pp. 290–299.
    • (1985) Proc. ICCAD-85 , pp. 290-299
    • Beekman, J.1    Owens, R.M.2    Irwin, M.J.3
  • 4
    • 0023230722 scopus 로고
    • An overview of the Penn State design system
    • July
    • M. J. Irwin and R. M. Owens, “An overview of the Penn State design system,” in Proc. DAC-87, July 1987, pp. 516–522.
    • (1987) Proc. DAC-87 , pp. 516-522
    • Irwin, M.J.1    Owens, R.M.2
  • 6
    • 0022868517 scopus 로고
    • Iterative construction of binary lookahead addition trees
    • C. A. Papachristou, “Iterative construction of binary lookahead addition trees,” Comput. Elect. Eng., vol. 12, no. 3/4, pp. 101–107, 1986.
    • (1986) Comput. Elect. Eng. , vol.12 , Issue.3/4 , pp. 101-107
    • Papachristou, C.A.1
  • 7
    • 21544432908 scopus 로고
    • On the time required to perform addition
    • S. Winograd, “On the time required to perform addition,” J. ACM, vol. 12, no. 2, pp. 277–285, 1965.
    • (1965) J. ACM , vol.12 , Issue.2 , pp. 277-285
    • Winograd, S.1
  • 8
    • 84939043074 scopus 로고
    • On the time required to perform multiplication
    • “On the time required to perform multiplication,” J. ACM, vol. 14, no. 4, pp. 793–802, 1967.
    • (1967) J. ACM , vol.14 , Issue.4 , pp. 793-802
  • 10
    • 0025503056 scopus 로고
    • Exploiting communication complexity for multi-level logic synthesis
    • Oct.
    • T.-T. Hwang, R. M. Owens, and M. J. Irwin, “Exploiting communication complexity for multi-level logic synthesis,” IEEE Trans. Comput.-Aided Design, vol. 9, pp. 1017–1027, Oct. 1990.
    • (1990) IEEE Trans. Comput.-Aided Design , vol.9 , pp. 1017-1027
    • Hwang, T.-T.1    Owens, R.M.2    Irwin, M.J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.