Physical Timing Modeling for Bipolar VLSI

IEEE Journal of Solid-State Circuits

Volumn 27, Issue 9, 1992, Pages 1245-1254

  Yang, Andrew T ^a   Chang, Yu Hsu ^a  

^a UNIVERSITY OF WASHINGTON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; COMPUTER SIMULATION; DIGITAL CIRCUITS; MATHEMATICAL MODELS; OPTIMIZATION;

ANALYTICAL TIMING MODELING; BIPOLAR DELAY MODELS; BIPOLAR DIGITAL CIRCUITS; BIPOLAR VLSI; PHYSICAL TIMING MODELING; SWITCH LEVEL TIMING SIMULATION; TECHNOLOGY MAPPING; TIMING ANALYSIS; TIMING VERIFICATION;

VLSI CIRCUITS;

EID: 0026923446     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.149428     Document Type: Article

References (12)

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