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Volumn 41, Issue 8, 1992, Pages 931-939

A Spanning Tree Carry Lookahead Adder

Author keywords

Adders; adders; carry lookahead adders; carry select; fast adders; fundamental carry operation; high radix lookahead carry; Manchester carry chain circuit

Indexed keywords

CARRY LOGIC; DIGITAL ARITHMETIC;

EID: 0026907993     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.156535     Document Type: Article
Times cited : (97)

References (14)
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    • Lehman, M.1    Burla, N.2
  • 3
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    • Carry-select adder
    • O. J. Bedrij, “Carry-select adder,” IRE Trans. Electron. Comput., vol. EC-11, pp. 340–346, 1962.
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    • Bedrij, O.J.1
  • 4
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    • Conditional-sum addition logic
    • J, Sklansky, “Conditional-sum addition logic,” IRE Trans. Electron. Comput., vol. EC-9, ppruq. 226–231, 1960.
    • (1960) IRE Trans. Electron. Comput , vol.EC-9 , pp. 226-231
    • Sklansky, J.1
  • 5
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    • A regular layout for parallel adders
    • R. P. Brent and H. T. Rung, “A regular layout for parallel adders,” IEEE Trans. Comput., vol. C-31, pp. 260–264, 1982.
    • (1982) IEEE Trans. Comput , vol.C-31 , pp. 260-264
    • Brent, R.P.1    Rung, H.T.2
  • 6
    • 0000760312 scopus 로고
    • High-speed binary adder
    • May
    • H. Ling, “High-speed binary adder,” IBM J. Res. Develop., vol. 25, pp. 156–166, May 1981.
    • (1981) IBM J. Res. Develop , vol.25 , pp. 156-166
    • Ling, H.1
  • 9
    • 24944572091 scopus 로고
    • Parallel addition in digital computers: A new fast 'carry' circuit
    • T. Kilbum, D. B. G. Edwards, and D. Aspinall, “Parallel addition in digital computers: A new fast ‘carry’ circuit,” IEE Proc., vol. 106, pt. B, pp. 464—466, 1959.
    • (1959) IEE Proc , vol.106 , pp. 464-466
    • Kilbum, T.1    Edwards, D.B.G.2    Aspinall, D.3
  • 11
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    • Analysis and design of CMOS Manchester adders ith variable carry skip
    • P. K. Chan and M. D. F. Schlag, “Analysis and design of CMOS Manchester adders ith variable carry skip,” IEEE Trans Comput., vol. 39, pp. 983–992, 1990.
    • (1990) IEEE Trans Comput , vol.39 , pp. 983-992
    • Chan, P.K.1    Schlag, M.D.F.2
  • 12
    • 0026173205 scopus 로고
    • Delay optimization of carry-skip adders and block carry-lookahead adders
    • P. K. Chan et ai, “Delay optimization of carry-skip adders and block carry-lookahead adders,” in Proc. lOthSymp. Comput. Arithmetic, 1991, pp. 154–164.
    • (1991) Proc. lOthSymp. Comput. Arithmetic , pp. 154-164
    • Chan, P.K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.