메뉴 건너뛰기




Volumn 27, Issue 7, 1992, Pages 1028-1035

Experimental Investigation of the Minimum Signal for Reliable Operation of DRAM Sense Amplifiers

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS; DATA STORAGE, SEMICONDUCTOR; ELECTRIC MEASUREMENTS; ELECTRONIC CIRCUITS, TRIGGER;

EID: 0026896296     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.142598     Document Type: Article
Times cited : (16)

References (11)
  • 1
    • 0026406940 scopus 로고
    • A technique for measuring threshold mismatch in DRAM sense amplifier devices
    • Mar.
    • E. J. Sprogis, “A technique for measuring threshold mismatch in DRAM sense amplifier devices,” in Proc. IEEE Int. Conf. Microelectron. Test Structures, Mar. 1991, pp. 103-106.
    • (1991) Proc. IEEE Int. Conf. Microelectron. Test Structures , pp. 103-106
    • Sprogis, E.J.1
  • 2
    • 0027039688 scopus 로고
    • A novel test structure for monitoring technological mismatches in DRAM processes
    • Mar.
    • H. Geib et al., “A novel test structure for monitoring technological mismatches in DRAM processes,” in Proc. IEEE Int. Conf. Microelectron. Test Structures, Mar. 1992, pp. 24-29.
    • (1992) Proc. IEEE Int. Conf. Microelectron. Test Structures , pp. 24-29
    • Geib, H.1
  • 3
    • 0026185552 scopus 로고
    • Circuit techniques for 1.5-3.6-V battery-operated 64-Mb DRAM
    • July
    • Y. Nakagome et al., “Circuit techniques for 1.5-3.6-V battery-operated 64-Mb DRAM,” IEEE J. Solid-State Circuits, vol. 26, pp. 1003–1009, July 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 1003-1009
    • Nakagome, Y.1
  • 4
    • 0024091883 scopus 로고
    • The impact of data-line interference noise on DRAM scaling
    • Oct.
    • Y. Nakagome et al. “The impact of data-line interference noise on DRAM scaling,” IEEE J. Solid-State Circuits, vol. 23, pp. 11201127, Oct. 1988.
    • (1988) IEEE J. Solid-State Circuits , vol.23 , pp. 11201127
    • Nakagome, Y.1
  • 5
    • 0024612454 scopus 로고
    • Analysis of coupling noise between adjacent bit-lines in megabit DRAM's
    • Feb.
    • Y. Konishi et al., “Analysis of coupling noise between adjacent bit-lines in megabit DRAM's,” IEEE J. Solid-State Circuits, vol. 24, pp. 35–42, Feb. 1989.
    • (1989) IEEE J. Solid-State Circuits , vol.24 , pp. 35-42
    • Konishi, Y.1
  • 6
    • 0023438831 scopus 로고
    • Dummy reversal technique in megabit DRAM
    • Oct.
    • T. Takeshima et al. “Dummy reversal technique in megabit DRAM,” NEC R&D, no. 87, pp. 14-19, Oct. 1987.
    • (1987) NEC R&D , Issue.87 , pp. 14-19
    • Takeshima, T.1
  • 7
    • 0020155349 scopus 로고
    • On the design of MOS dynamic sense amplifiers
    • July
    • N. N. Wang, “On the design of MOS dynamic sense amplifiers,” IEEE Trans. Circuits Syst., vol. CAS-29, pp. 467–477, July 1982.
    • (1982) IEEE Trans. Circuits Syst. , vol.CAS-29 , pp. 467-477
    • Wang, N.N.1
  • 8
    • 0024719474 scopus 로고
    • Optimized sensing scheme of DRAM's
    • Aug.
    • R. Kraus, K. Hoffmann, “Optimized sensing scheme of DRAM's,” IEEE J. Solid-State Circuits, vol. 24, pp. 895–899, Aug. 1989.
    • (1989) IEEE J. Solid-State Circuits , vol.24 , pp. 895-899
    • Kraus, R.1    Hoffmann, K.2
  • 9
    • 0016047227 scopus 로고
    • Optimization of the latching pulse for dynamic flip-flop sensors
    • Apr.
    • W. T. Lynch and H. J. Boll, “Optimization of the latching pulse for dynamic flip-flop sensors,” IEEE J. Solid-State Circuits, vol. SC-9, pp. 49–55, Apr. 1974.
    • (1974) IEEE J. Solid-State Circuits , vol.SC-9 , pp. 49-55
    • Lynch, W.T.1    Boll, H.J.2
  • 10
    • 0022700963 scopus 로고
    • Sensitivity of dynamic MOS flip-flop sense amplifiers
    • Apr.
    • K. Natori, “Sensitivity of dynamic MOS flip-flop sense amplifiers,” IEEE Trans. Electron Devices, vol. ED-33, pp. 482–488, Apr. 1986.
    • (1986) IEEE Trans. Electron Devices , vol.ED-33 , pp. 482-488
    • Natori, K.1
  • 11
    • 84941450210 scopus 로고    scopus 로고
    • Block decoded sense amplifier driver for highspeed sensing in DRAM's
    • to be published in
    • H. Geib et al., “Block decoded sense amplifier driver for highspeed sensing in DRAM's,” to be published in IEEE J. Solid-State Circuits.
    • IEEE J. Solid-State Circuits
    • Geib, H.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.