메뉴 건너뛰기




Volumn 2, Issue 2, 1992, Pages 169-175

VLSI Architecture for Block-Matching Motion Estimation Algorithm

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER PROGRAMMING--ALGORITHMS; IMAGE PROCESSING--IMAGE CODING; SIGNAL PROCESSING;

EID: 0026883789     PISSN: 10518215     EISSN: 15582205     Source Type: Journal    
DOI: 10.1109/76.143416     Document Type: Article
Times cited : (169)

References (18)
  • 1
    • 0023314483 scopus 로고
    • Motion-compensated coder for video-conferencing
    • March
    • R. Srinivasan and K. R. Rao, “Motion-compensated coder for video-conferencing,” IEEE Trans. Commun., vol. COM-35, pp. 297–304, March 1987.
    • (1987) IEEE Trans. Commun , vol.COM-35 , pp. 297-304
    • Srinivasan, R.1    Rao, K.R.2
  • 2
    • 0019926897 scopus 로고
    • A motion compensated interframe scheme for television pictures
    • Jan.
    • Y. Ninomiya and Y. Ohtsuka, “A motion compensated interframe scheme for television pictures,” IEEE Trans. Commun., vol. COM-30, pp. 201–211, Jan. 1982.
    • (1982) IEEE Trans. Commun , vol.COM-30 , pp. 201-211
    • Ninomiya, Y.1    Ohtsuka, Y.2
  • 3
    • 0026121072 scopus 로고
    • Adaptive motion compensated DCT coding
    • March
    • C. H. Hsieh, P. C. Lu, and J. C. Tsai, “Adaptive motion compensated DCT coding,” J. Chinese Inst. Eng., vol. 14, pp. 165–172, March 1991.
    • (1991) J. Chinese Inst. Eng , vol.14 , pp. 165-172
    • Hsieh, C.H.1    Lu, P.C.2    Tsai, J.C.3
  • 4
    • 0019678185 scopus 로고
    • Displacement measurement and its application in interframe image coding
    • Dec.
    • J. R. Jain and A. K. Jain, “Displacement measurement and its application in interframe image coding,” IEEE Trans. Commun., vol. COM-29, pp. 1799–1808, Dec. 1981.
    • (1981) IEEE Trans. Commun , vol.COM-29 , pp. 1799-1808
    • Jain, J.R.1    Jain, A.K.2
  • 5
    • 84916506716 scopus 로고
    • Description of reference model 8 (RM8)
    • Specialists Group on Coding for Visual Telephony, June
    • “Description of reference model 8 (RM8),” Document 525, CCITT SG XV/4, Specialists Group on Coding for Visual Telephony, June 1989.
    • (1989) Document 525, CCITT SG XV/4
  • 6
    • 84941871379 scopus 로고    scopus 로고
    • DigiCipher HDTV system
    • General Instrument Corp., June
    • “DigiCipher HDTV system,” General Instrument Corp., June 1990.
  • 7
    • 0022107254 scopus 로고
    • Predictive coding based on efficient motion estimation
    • Aug.
    • R. Srinivasan and K. R. Rao, “Predictive coding based on efficient motion estimation,” IEEE Trans. Commun., vol. COM-33, pp. 888–895, Aug. 1985.
    • (1985) IEEE Trans. Commun , vol.COM-33 , pp. 888-895
    • Srinivasan, R.1    Rao, K.R.2
  • 8
    • 0025399304 scopus 로고
    • Motion estimation algorithm using interblock correlation
    • Mar.
    • C. H. Hsich, P. C. Lu, J. S. Shyn, and E. H. Lu, “Motion estimation algorithm using interblock correlation,” IEE Electron. Lett., vol. 26, no. 5, pp. 276–277, Mar. 1990.
    • (1990) IEE Electron. Lett , vol.26 , Issue.5 , pp. 276-277
    • Hsich, C.H.1    Lu, P.C.2    Shyn, J.S.3    Lu, E.H.4
  • 9
    • 0023206185 scopus 로고
    • An efficient block-matching algorithm for motion compensated coding
    • A. Puri, H. M. Hang, and D. L. Schiling, “An efficient block-matching algorithm for motion compensated coding,” in Proc. IEEE ICASSP’87, 1987, pp. 25.4.1-25.4.4.
    • (1987) Proc. IEEE ICASSP’87 , pp. 25.4.1-25.4.4
    • Puri, A.1    Hang, H.M.2    Schiling, D.L.3
  • 10
    • 0025461854 scopus 로고
    • The cross-search algorithm for motion estimation
    • July
    • M. Ghanbari, “The cross-search algorithm for motion estimation,” IEEE Trans. Commun., vol. COM-38, pp. 950–953, July 1990.
    • (1990) IEEE Trans. Commun , vol.COM-38 , pp. 950-953
    • Ghanbari, M.1
  • 11
    • 0019714747 scopus 로고
    • Motion compensated interframe coding for video conferencing
    • New Orleans, LA, Nov.
    • T. Koga, K. Iinuma, A. Hirano, Y. Iijima, and T. Ishiguro, “Motion compensated interframe coding for video conferencing,” in Proc. Nat. Telecommun. Conf., New Orleans, LA, Nov. 1981, pp. G5.3.1-5.3.5.
    • (1981) Proc. Nat. Telecommun. Conf , pp. G5.3.1-G5.3.5
    • Koga, T.1    Iinuma, K.2    Hirano, A.3    Iijima, Y.4    Ishiguro, T.5
  • 12
    • 84941864618 scopus 로고
    • Full motion 64 kbit/s video codec with 8 DSP’s
    • presented at the, Hannover, Germany, June
    • F. May, “Full motion 64 kbit/s video codec with 8 DSP’s,” presented at the Int. Workshop on 64 kbit/s Coding of Moving Video, Hannover, Germany, June 1988.
    • (1988) Int. Workshop on 64 kbit/s Coding of Moving Video
    • May, F.1
  • 13
    • 84941866135 scopus 로고
    • Using array processors for low-bit rate video coding
    • presented at the, Hannover, Germany, June
    • C. Hoek, “Using array processors for low-bit rate video coding,” presented at the Int. Workshop on 64 kbit/s Coding of Moving Video, Hannover, Germany, June 1988.
    • (1988) Int. Workshop on 64 kbit/s Coding of Moving Video
    • Hoek, C.1
  • 14
    • 84941864338 scopus 로고
    • Architecture for a programmable real time processor for digital video signals adapted to motion estimation algorithm
    • Visual Communications and Image Processing ’88), Cambridge, MA, Nov.
    • T. Wehberg and H. Volkers, “Architecture for a programmable real time processor for digital video signals adapted to motion estimation algorithm,” in Proc. SPIE, vol. 1001 (Visual Communications and Image Processing ’88), Cambridge, MA, Nov. 1988, pp. 908–916.
    • (1988) Proc. SPIE , vol.1001 , pp. 908-916
    • Wehberg, T.1    Volkers, H.2
  • 16
    • 0024755322 scopus 로고
    • A family of VLSI design for the motion compensation block-matching algorithm
    • Oct.
    • K. M. Yang, M. T. Sun, and L. Wu, “A family of VLSI design for the motion compensation block-matching algorithm,” IEEE Trans. Circuits Syst., vol. 36, no. 10, pp. 1317–1325, Oct. 1989.
    • (1989) IEEE Trans. Circuits Syst , vol.36 , Issue.10 , pp. 1317-1325
    • Yang, K.M.1    Sun, M.T.2    Wu, L.3
  • 17
    • 0024754362 scopus 로고
    • Parameterizable VLSI architectures for the full-search block-matching algorithm
    • Oct.
    • L. D. Vos and M. Stegherr, “Parameterizable VLSI architectures for the full-search block-matching algorithm,” IEEE Trans. Circuits Syst., vol. 36, no. 10, pp. 1309–1316, Oct. 1989.
    • (1989) IEEE Trans. Circuits Syst , vol.36 , Issue.10 , pp. 1309-1316
    • Vos, L.D.1    Stegherr, M.2
  • 18
    • 0024753317 scopus 로고
    • Array architectures for block matching algorithms
    • Oct.
    • T. Komarek and P. Pirsch, “Array architectures for block matching algorithms,” IEEE Trans. Circuits Syst., vol. 36, no. 10, pp. 1301–1308, Oct. 1989.
    • (1989) IEEE Trans. Circuits Syst , vol.36 , Issue.10 , pp. 1301-1308
    • Komarek, T.1    Pirsch, P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.