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Volumn 2, Issue 2, 1992, Pages 123-134

An All-ASIC Implementation of a Low Bit-Rate Video Codec

Author keywords

[No Author keywords available]

Indexed keywords

CODES, SYMBOLIC; INTEGRATED CIRCUITS, VLSI; STANDARDS; VIDEO RECORDING;

EID: 0026882631     PISSN: 10518215     EISSN: 15582205     Source Type: Journal    
DOI: 10.1109/76.143412     Document Type: Article
Times cited : (39)

References (19)
  • 1
    • 0003466835 scopus 로고    scopus 로고
    • Video codec for audiovisual services at p × 64 kb/s
    • CCITT Recommendation H.261, CDM XV-R 37-E, International Telegraph and Telephone Consultative Committee (CCITT), August
    • “Video codec for audiovisual services at p × 64 kb/s,” CCITT Recommendation H.261, CDM XV-R 37-E, International Telegraph and Telephone Consultative Committee (CCITT), August 1990.
  • 2
    • 0025386536 scopus 로고
    • Visual telephony as an ISDN application
    • Feb.
    • M. L. Liou, “Visual telephony as an ISDN application,” IEEE Commun. Magazine, vol. 28, no. 2, pp. 30–38, Feb. 1990.
    • (1990) IEEE Commun. Magazine , vol.28 , Issue.2 , pp. 30-38
    • Liou, M.L.1
  • 4
    • 0026141830 scopus 로고
    • An overview of p × 64 kb/s video coding standard
    • April
    • M. L. Liou, “An overview of p × 64 kb/s video coding standard,” Commun. ACM, pp. 59–63, April 1991.
    • (1991) Commun. ACM , pp. 59-63
    • Liou, M.L.1
  • 5
    • 0026403342 scopus 로고
    • VLSI implementation of a low bit-rate video codec
    • Singapore, June 11–14
    • M. L. Liou and H. Fujiwara, “VLSI implementation of a low bit-rate video codec,” in Proc. IEEE Int. Symp. on Circuits and Systems, Singapore, June 11–14, 1991, pp. 180–183.
    • (1991) Proc. IEEE Int. Symp. on Circuits and Systems , pp. 180-183
    • Liou, M.L.1    Fujiwara, H.2
  • 6
    • 84941866012 scopus 로고
    • VLSI implementation of system manager chip for p × 64 kbps video encoder
    • Sept. 4–6Rotterdam, The Netherlands
    • M. Tayama et. al., “VLSI implementation of system manager chip for p × 64 kbps video encoder,” in Proc. 3rd Int. Workshop on 64 kbit/s Coding of Moving Video, Sept. 4–6, 1990, Rotterdam, The Netherlands.
    • (1990) Proc. 3rd Int. Workshop on 64 kbit/s Coding of Moving Video
    • Tayama, M.1
  • 7
    • 0025565231 scopus 로고
    • VLSI architecture and implementation of a multifunction, forward/inverse discrete cosine transform processor
    • Oct. 1–4
    • M. Maruyama et. al., “VLSI architecture and implementation of a multifunction, forward/inverse discrete cosine transform processor,” in Proc. SPIE Visual Communications and Image Processing ‘90, vol. 1360, Oct. 1–4, 1990, pp. 410–417.
    • (1990) Proc. SPIE Visual Communications and Image Processing ‘90 , vol.1360 , pp. 410-417
    • Maruyama, M.1
  • 8
    • 84941864991 scopus 로고
    • A flexible motion-vector estimation chip for real-time video codecs
    • May 13–16Boston, MA
    • K. M. Yang et. al., “A flexible motion-vector estimation chip for real-time video codecs,” in Proc. IEEE 1990 Custom Integrated Circuits Conference, May 13–16, 1990, Boston, MA, pp. 17.5.1-17.5.4.
    • (1990) Proc. IEEE 1990 Custom Integrated Circuits Conference , pp. 17.5.1-17.5.4
    • Yang, K.M.1
  • 9
    • 84889982402 scopus 로고
    • VLSI implementation of a variable-length coding processor for real-time video
    • June 6–7Hsinchu, Taiwan, ROC
    • R. Saito et. al., “VLSI implementation of a variable-length coding processor for real-time video,” in Proc. IEEE Workshop on Visual Signal Processing and Communications, June 6–7, 1991, Hsinchu, Taiwan, ROC, pp. 87–90.
    • (1991) Proc. IEEE Workshop on Visual Signal Processing and Communications , pp. 87-90
    • Saito, R.1
  • 10
    • 84941867949 scopus 로고    scopus 로고
    • VLSI implementation of a flexible variable-length decoding processor for real-time video
    • Sept. 4–6, Rotterdam, The Netherlands
    • H. Fujiwara et. al., “VLSI implementation of a flexible variable-length decoding processor for real-time video,” in Proc. 3rd Int. Workshop on 64 kbit/s Coding of Moving Video, Sept. 4–6, Rotterdam, The Netherlands.
    • Proc. 3rd Int. Workshop on 64 kbit/s Coding of Moving Video
    • Fujiwara, H.1
  • 12
    • 0026137432 scopus 로고
    • MPEG: A video compression standard for multimedia applications
    • April
    • D. Le Gall, “MPEG: A video compression standard for multimedia applications,” Commun. ACM, vol. 34, no. 4, pp. 46–58, April 1991.
    • (1991) Commun. ACM , vol.34 , Issue.4 , pp. 46-58
    • Le Gall, D.1
  • 13
    • 0026142897 scopus 로고
    • The JPEG still picture compression standard
    • April
    • G. K. Wallace, “The JPEG still picture compression standard,” Commun. ACM, vol. 34, no. 4, pp. 59–63, April 1991.
    • (1991) Commun. ACM , vol.34 , Issue.4 , pp. 59-63
    • Wallace, G.K.1
  • 14
    • 0003685410 scopus 로고
    • IEEE standard specifications for the implementation of 8 x 8 inverse discrete cosine transforms
    • March 18
    • “IEEE standard specifications for the implementation of 8 x 8 inverse discrete cosine transforms,” IEEE Std. 1180–1990, March 18, 1991.
    • (1991) IEEE Std. 1180–1990
  • 15
    • 0016310744 scopus 로고
    • A new hardware realization of digital filters
    • Dec.
    • A. Peled and B. Liu, “A new hardware realization of digital filters,” IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-22, pp. 456-462, Dec. 1974.
    • (1974) IEEE Trans. Acoust., Speech, Signal Processing , vol.ASSP-22 , pp. 456-462
    • Peled, A.1    Liu, B.2
  • 16
    • 0024646951 scopus 로고
    • VLSI implementation of a 16 × 16 discrete cosine transform
    • April
    • M.-T. Sun, T. C. Chen, and A. M. Gottlieb, “VLSI implementation of a 16 × 16 discrete cosine transform,” IEEE Trans. Circuits Syst., vol. 36, no. 4, pp. 610–617, April 1989.
    • (1989) IEEE Trans. Circuits Syst , vol.36 , Issue.4 , pp. 610-617
    • Sun, M.-T.1    Chen, T.C.2    Gottlieb, A.M.3
  • 17
    • 0024755322 scopus 로고
    • A family of VLSI designs for the motion compensation block-matching algorithm
    • Oct.
    • K. M. Yang, M.-T. Sun, and L. Wu, “A family of VLSI designs for the motion compensation block-matching algorithm,” IEEE Trans. Circuits Syst., vol. 36, no. 10, pp. 1317–1325, Oct. 1989.
    • (1989) IEEE Trans. Circuits Syst , vol.36 , Issue.10 , pp. 1317-1325
    • Yang, K.M.1    Sun, M.-T.2    Wu, L.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.