High-Speed VLSI Architectures for Huffman and Viterbi Decoders

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 39, Issue 6, 1992, Pages 385-391

  Parhi, Keshab K ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODES, SYMBOLIC--DECODING; COMPUTER ARCHITECTURE; MATHEMATICAL TECHNIQUES--MATRIX ALGEBRA;

HUFFMAN DECODERS; VITERBI DECODERS;

INTEGRATED CIRCUITS, VLSI;

EID: 0026877653     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.145297     Document Type: Article

References (15)

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