SCOPUS 정보 검색 플랫폼

Volumn 3, Issue 2, 1992, Pages 171-173

Multiple fault detection in two-level multi-output circuits

Author keywords

checkpoint faults; crosspoint faults; fault modeling; multi output combinational circuits

Indexed keywords

AUTOMATIC TESTING; COMBINATORIAL CIRCUITS;

CHECKPOINT FAULTS; CROSSPOINT FAULTS; MULTIPLE FAULT DETECTION; MULTIPLE STUCK FAULT TEST; TWO-LEVEL LOGIC CIRCUITS; TWO-LEVEL MULTI-OUTPUT CIRCUITS;

LOGIC CIRCUITS;

EID: 0026869172 PISSN: 09238174 EISSN: 15730727 Source Type: Journal
DOI: 10.1007/BF00137254 Document Type: Article

Times cited : (11)

References (12)

1
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- W. Maly, “Realistic fault modeling for VLSI testing,” Proc. 24th Design Automation Conf., pp. 173–180, June 1987.

2
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- G. Hachtel, R. Jacoby, K. Keutzer and C. Morrison, “On properties of algebraic transformations and the multifault testability of multilevel logic,” Proc. Int. Conf. Computer Aided Design, pp. 422–425, 1989.

3
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- J. Jacob and V.D. Agarwal, “Functional test generation for sequential circuits,” Proc. 5th International Conf. VLSI Design, Bangalore, India, pp. 17–24, January 1992.

4
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- Detection of multiple faults in combinational logic networks
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- Kohavi, I.¹ Kohavi, Z.²

5
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- A new representation for faults in combinational digital circuits
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6
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7
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- M.A. Breuer and A.D. Friedman, Diagnosis and Reliable Design of Digital Systems, Computer Science Press, 1976.

8
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- Checkpoints in irredundant two-level combinational circuits
- (1991) Jour. Electronic Testing: Theory and Applic. , vol.2 , pp. 395-397
- Chen, J.E.¹ Lee, C.L.² Shen, W.Z.³

9
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- Detection of faults in programmable logic arrays
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10
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- Author's reply
- (1986) IEEE Trans. Comput. , vol.100-135 , pp. 931
- Smith, J.E.¹

11
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- Comments on detection of faults in programmable logic arrays
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- Wei, L.Y.¹ Wei, J.²

12
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- J. Jacob and N.N. Biswas, “GTBD faults and lower bounds on multiple fault coverage of single fault test sets,” Proc. International Test Conf., pp. 849–855, September 1987.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.