An 8.5-ns 112-b Transmission Gate Adder with a Conflict-Free Bypass Circuit

IEEE Journal of Solid-State Circuits

Volumn 27, Issue 4, 1992, Pages 657-659

  Sato, T ^a   Sakate, M ^a   Okada, H ^a   Sukemura, T ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS--APPLICATIONS; SEMICONDUCTOR DEVICES, MOS--APPLICATIONS; TRANSISTORS--APPLICATIONS;

CARRY-SKIP PATHS; CMOS TECHNOLOGY; CONDITIONAL SUM GENERATION CIRCUIT; CONFLICT-FREE BYPASS CIRCUIT; MANCHESTER ADDER; TRANSMISSION GATE ADDER;

COMPUTERS;

EID: 0026851438     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.126557     Document Type: Article

References (9)

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