-
1
-
-
0016506999
-
Physical limits in digital electronics
-
R. W. Keyes, “Physical limits in digital electronics,” Proc. IEEE, vol. 63, p. 740, 1975.
-
(1975)
Proc. IEEE
, vol.63
, pp. 740
-
-
Keyes, R.W.1
-
2
-
-
0020240615
-
Threshold voltage deviation in very small MOS transistors due to local impurity fluctuations
-
T. Hagiwara, K. Yamaguchi, and S. Asai, “Threshold voltage deviation in very small MOS transistors due to local impurity fluctuations,” in Tech. Dig. VLSI Symp., 1982, p. 46.
-
(1982)
Tech. Dig. VLSI Symp.
, pp. 46
-
-
Hagiwara, T.1
Yamaguchi, K.2
Asai, S.3
-
3
-
-
0019608286
-
Technology challenges for ultrasmall MOSFETs
-
R. H. Dennard, “Technology challenges for ultrasmall MOSFETs,” J. Vac. Sci. Technol., vol. 19, p. 537, 1981.
-
(1981)
J. Vac. Sci. Technol.
, vol.19
, pp. 537
-
-
Dennard, R.H.1
-
4
-
-
0002861764
-
Problems related to p-n junctions in silicon
-
W. Shockley, “Problems related to p-n junctions in silicon,” Solid-State Electron., vol. 2, p. 35, 1961.
-
(1961)
Solid-State Electron.
, vol.2
, pp. 35
-
-
Shockley, W.1
-
5
-
-
0016116644
-
Design of ion-implanted MOSFETs with very small physical dimensions
-
R. H. Dennard, F. H. Gaensslen, H. N. Yu, V. L. Rideout, E. Bassous, and A. R. Leblanc, “Design of ion-implanted MOSFETs with very small physical dimensions,” IEEE J. Solid State Circuits, vol. SC-9, p. 256, 1974.
-
(1974)
IEEE J. Solid State Circuits
, vol.SC-9
, pp. 256
-
-
Dennard, R.H.1
Gaensslen, F.H.2
Yu, H.N.3
Rideout, V.L.4
Bassous, E.5
Leblanc, A.R.6
-
6
-
-
0021406605
-
Generalized scaling theory and its application to a 1/4 micrometer MOSFET design
-
G. Baccarani, M. R. Wordeman, and R. H. Dennard, “Generalized scaling theory and its application to a 1/4 micrometer MOSFET design,” IEEE Trans. Electron Devices, vol. ED-31, p. 452, 1984.
-
(1984)
IEEE Trans. Electron Devices
, vol.ED-31
, pp. 452
-
-
Baccarani, G.1
Wordeman, M.R.2
Dennard, R.H.3
-
8
-
-
84939696379
-
Development and application of a high-speed 2-dimensional time dependent device simulator (MOS2C)
-
T. Wada and R. Dang, “Development and application of a high-speed 2-dimensional time dependent device simulator (MOS2C),” in Proc. NASECODE IV, 1985, p. 108.
-
(1985)
Proc. NASECODE IV
, pp. 108
-
-
Wada, T.1
Dang, R.2
-
9
-
-
0022009050
-
Analysis of an anomalous subthreshold current in a fully recessed oxide MOSFET using a three-dimensional device simulator
-
N. Shigyo and R. Dang, “Analysis of an anomalous subthreshold current in a fully recessed oxide MOSFET using a three-dimensional device simulator,” IEEE J. Solid-State Circuits., vol. SC-20 p. 361, 1985.
-
(1985)
IEEE J. Solid-State Circuits.
, vol.SC-20
, pp. 361
-
-
Shigyo, N.1
Dang, R.2
-
10
-
-
84941483268
-
Semiconductor device simulation
-
N. Shigyo and T. Wada, “Semiconductor device simulation,” J. IEICE, vol. 74, p. 150, 1991.
-
(1991)
J. IEICE
, vol.74
, pp. 150
-
-
Shigyo, N.1
Wada, T.2
-
11
-
-
34547827353
-
Properties of semiconductor surface inversion layers in the electric quantum limit
-
F. Stem and W. E. Howard, “Properties of semiconductor surface inversion layers in the electric quantum limit,” Phys. Rev., vol. 163, p. 816, 1967.
-
(1967)
Phys. Rev.
, vol.163
, pp. 816
-
-
Stem, F.1
Howard, W.E.2
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