Four-quadrant CMOS analogue multiplier

Electronics Letters

Volumn 28, Issue 7, 1992, Pages 649-650

  Kim, Y H ^a   Park, S B ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

Circuit theory and design; Multipliers

Indexed keywords

INTEGRATED CIRCUITS, CMOS; SEMICONDUCTOR DEVICES, MOS; TRANSISTORS, FIELD EFFECT;

ANALOG MULTIPLIERS; FOUR-QUADRANT MULTIPLIERS; MOS TRANSISTORS;

COMPUTERS, ANALOG;

EID: 0026825986     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19920410     Document Type: Article

References (7)

1. DAVID, C. S., and ROBERT, G. M.: ‘A four-quadrant NMOS analog multiplier’, IEEE J. Solid-State Circuits, 1982, SC-17, pp. 1174-1182
2. KIM, C. W., and PARK, S. B.: ‘New four-quadrant CMOS analogue multiplier’, Electron. Lett., 1987,23, pp. 1268-1270
3. KLAAS, B., and HANS, W.: ‘A CMOS four-quadrant analog multiplier’, IEEE J. Solid-State Circuits, 1986, SC-21, pp. 430-435
4. HONG, Z., and MELCHIOR, H.: ‘Analogue four-quadrant CMOS multiplier with resistors’, Electron. Lett., 1985, 21, pp. 531-532
5. WONG, S. L., KALYANASUNDARAM, N., and SALAMA, C. A. T.: ‘Wide dynamic range four-quadrant CMOS analog multiplier using linearized transconductance’, IEEE J. Solid-State Circuits, 1986, SC-21, pp. 1120-1122
6. VISWANATHAN, T. R.: CMOS transconductance element’, Proc. IEEE, 1986, 74, (1), pp. 222-224
7. WILSON, G., and CHAN, P. K.: ‘Low-distortion CMOS transconductor’, Electron. Lett., 1990, 26, pp. 720-722