Boolean Matrix Transforms for the Minimization of Modulo-2 Canonical Expansions

IEEE Transactions on Computers

Volumn 41, Issue 3, 1992, Pages 342-347

  Lui, P K ^a   Muzio, J C ^a  

^a UNIVERSITY OF VICTORIA   (Canada)

Author keywords

Fast Boolean matrix transforms fixed basis expansions fixed polarity expansions; Gray codes Kronecker products modulo 2 expansions minimization Reed Muller canonical expansions

Indexed keywords

CODES, SYMBOLIC--ENCODING;

FAST BOOLEAN MATRIX TRANSFORMS; GRAY CODES; REED-MULLER CANONICAL EXPANSIONS;

COMPUTER METATHEORY;

EID: 0026823085     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.127446     Document Type: Article

References (30)

1. C. E. Shannon, “A symbolic analysis of relay and switching circuits,” Trans. AIEE, vol. 57, pp. 713–723, 1938.
2. I. S. Reed, “A class of multiple-error-correcting codes and their decoding scheme,” IRE Trans. Inform. Theory, vol. IT-4, pp. 38–49, Sept. 1954.
3. D. E. Muller, “Application of Boolean algebra to switching circuit design for error detection,” IEEE Trans. Comput., vol. EC-3, pp. 6–12, Sept. 1954.
4. S. B. Akers, Jr., “On a theory of Boolean functions,” J. Soc. Indust. Appl. Math., vol. 7, no. 4, pp. 487–498. Dec. 1959.
5. P. Calingaert, “Switching function canonical forms based on communtative and associative binary operations,” AIEE Trans., vol. 79, pp. 808–814, Jan. 1961.
6. R.J. Lechner, “Transformations among switching function canonical forms,” IEEE Trans. Electron. Comput.,vol. EC-12, pp. 129–130, Apr. 1963.
7. M. Davio, “Ring-sum expansions of Boolean functions,” in Proc. Symp. Comput. and Automata, Polytechnic Institute of Brooklyn, Apr. 1971, pp. 411–418.
8. G. Bioul, M. Davio, and J.P. Deschamps, “Minimization of ring-sum expansions of Boolean functions,” Philips Res. Rep., vol. 28, pp. 17–36, 1973.
9. M. Davio, J.P. Deschamps, and A. Thayse, Discrete and Switching Functions. New York: McGraw-Hill, 1978.
10. S. Swamy, “On generalized Reed-Muller expansions,” IEEE Trans. Comput., vol. C-21, pp. 1008–1009, Sept. 1972.
11. K. K. Saluja, and E. H. Ong, “Minimization of Reed-Muller canonical expansion,” IEEE Trans. Comput., vol. C-28, pp. 535–537, July 1979.
12. X. Wu, X. Chen, and S. L. Hurst, “Mapping of Reed-Muller coefficients and the minimization of exclusive-OR switching functions,” IEE Proc., vol. 129, part E, pp. 15–20, 1982.
13. Ph.W. Besslich, “Efficient computer method for EXOR logic design,” IEEE Proc., vol. 130, part E, pp. 203–206, 1983.
14. Y. Z. Zhang and P. J. W. Rayner, “Minimization of Reed-Muller polynomials with fixed polarity,” IEE Proc., vol. 131, part E, pp. 177–186, Sept. 1984.
15. D. H. Green, “Reed-Muller expansions of incompletely specified functions,” IEEE Proc., vol. 134, part E, pp. 228–236, Sept. 1987.
16. A. Mukhopadhyay and G. Schmitz, “Minimization of exclusive Or and logical equivalence switching circuits,” IEEE Trans. Comput., vol. C-19, pp. 132–140, Feb. 1970.
17. J.P. Robinson and C.L. Yeh, “A method for modulo-2 minimization,” IEEE Trans. Comput., vol. C-31, pp. 800–801, Aug. 1982.
18. T. Sassao and P. Besslich, “On the complexity of Mod-2 sum PLA’s,” IEEE Trans. Comput., vol. C-39, pp. 262–266, Feb. 1990.
19. S. M. Reddy, “Easily testable realizations for logic functions,” IEEE Trans. Comput., vol. C-21, pp. 1183–1188, Nov. 1972.
20. K. K. Saluja and S.M. Reddy, “Fault detecting test sets for Reed-Muller canonic networks,” IEEE Trans. Comput., vol. C-24, pp. 995–998, Oct. 1975.
21. D. K. Pradhan, “Universal test sets for multiple fault detection in and exor arrays,” IEEE Trans. Comput., vol. C-27, pp. 181–187, Feb. 1978.
22. E. J. McCluskey, Logic Design Principles: with Emphasis on Testable Semi-Custom Circuits. Englewood Cliffs, NJ: Prentice-Hall, 1986, pp. 448–450.
23. A. Graham, Kronecker Products and Matrix Calculus: with Applications. Chichester: Ellis Horwood, 1981.
24. I. Flores, “Reflected number systems,” IEEE Trans. Electron. Comput., vol. EC-5, pp. 79–82, June 1956.
25. E. M. Reingold, J. Nievergelt, and N. Deo, Combinatorial Algorithms: Theory and Practice. Englewood Cliffs, NJ: Prentice-Hall, 1977.
26. P. K. Lui and J. C. Muzio, “A fast computer algorithm for the minimization of fixed polarity modulo-2 ring-sum expansions,” in Proc. 1988 Canadian Conf. Very Large Scale Integration, Oct. 1988.
27. —, “Simplified theory of Boolean functions,” Int. J. Electron., vol. 68, pp. 329–341, Mar. 1990.
28. —, “On the structure of modulo-2 ring-sum canonical expansions for Boolean functions,” Int. J. Electron., vol. 72, pp. 21–35, Jan. 1992.
29. —, “Boolean matrix transforms for the parity spectrum and the minimization of modulo-2 canonical expansions,” IEE Proc., vol. 138, part E, pp. 411–417, 1991.
30. —, “Constrained parity testing,” J. Electron. Testing, Theory & Appl., vol. 2, pp. 279–291, 1991.