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Volumn 39, Issue 2, 1992, Pages 379-388

Improving the ESD Failure Threshold of Silicided n-MOS Output Transistors by Ensuring Uniform Current Flow

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC DISCHARGES; ELECTROSTATICS; SEMICONDUCTOR DEVICES, MOS;

EID: 0026820351     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.121697     Document Type: Article
Times cited : (74)

References (15)
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  • 2
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  • 3
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    • (1988) IEEE Trans. Electron. Devices , vol.35 , Issue.12 , pp. 2140
    • Chen, K.-L.1
  • 4
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    • Hot-electron reliability and ESD latent damage
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    • S. Aur, A. Chatterjee, and T. Polgreen, “Hot-electron reliability and ESD latent damage,” IEEE Trans. Electron Devices, vol. 35, no. 12, p. 2189, Dec. 1988.
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    • Aur, S.1    Chatterjee, A.2    Polgreen, T.3
  • 5
    • 0024629867 scopus 로고
    • An investigation of the nature and mechanisms of ESD damage in nMOS transistors
    • E. A. Amerasekera and D. S. Campbell, “An investigation of the nature and mechanisms of ESD damage in nMOS transistors,” Solid-State Electron., vol. 32, no. 3, p. 199, 1989.
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  • 6
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    • Transmission line pulsing techniques for circuit modeling of ESD phenomena
    • T. J. Maloney and N. Khurana, “Transmission line pulsing techniques for circuit modeling of ESD phenomena,” in Proc. EOS/ESD Symp., 1985, p. 49.
    • (1985) Proc. EOS/ESD Symp , pp. 49
    • Maloney, T.J.1    Khurana, N.2
  • 7
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    • Determination of threshold failure levels of semiconductor diodes and transistors due to pulse voltages
    • Dec.
    • D. C. Wunsch and R. R. Bell, “Determination of threshold failure levels of semiconductor diodes and transistors due to pulse voltages,” IEEE Trans. Nucl. Sci., vol. NS-15, 244, Dec. 1968.
    • (1968) IEEE Trans. Nucl. Sci , vol.NS-15 , Issue.244
    • Wunsch, D.C.1    Bell, R.R.2
  • 8
    • 0024176692 scopus 로고
    • Electrical overstress testing of a 256k UVEPROM to rectangular and double exponential pulses
    • D. G. Pierce, W. Shiley, B. D. Mulcahy, K. E. Wagner, and M. Wunder, “Electrical overstress testing of a 256k UVEPROM to rectangular and double exponential pulses,” in Proc. EOS/ESD Symp., 1988, p. 137.
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  • 12
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  • 13
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    • (1982) IEEE Trans. Electron Devices , vol.ED-29 , Issue.11 , pp. 1735
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.