-
1
-
-
4243132732
-
A high performance 0.25μm CMOS technology
-
in
-
B. Davari, W. H. Chang, M. R. Wordeman, C. S. Oh, Y. Taur, K. E. Petrillo, D. Moy, J. J. Bucchignano, H. Y. Ng, M. G. Rosenfield, F. J. Hohn, and M. D. Rodriguez, “A high performance 0.25μm CMOS technology,” in IEDM Tech. Dig., 1988, p. 56.
-
(1988)
IEDM Tech. Dig.
, pp. 56
-
-
Davari, B.1
Chang, W.H.2
Wordeman, M.R.3
Oh, C.S.4
Taur, Y.5
Petrillo, K.E.6
Moy, D.7
Bucchignano, J.J.8
Ng, H.Y.9
Rosenfield, M.G.10
Hohn, F.J.11
Rodriguez, M.D.12
-
2
-
-
84941860118
-
-
JEDEC Solid State Pro. Council, 2, 1984.
-
(1984)
, pp. 2
-
-
-
3
-
-
0024612395
-
A framework to evaluate technology and device design enhancements for MOS integrated circuits
-
C. G. Sodini, S. S. Wong, and P.-K. Ko, “A framework to evaluate technology and device design enhancements for MOS integrated circuits,” J. Solid-State Circuits, vol. 24, p. 118, 1989.
-
(1989)
J. Solid-State Circuits
, vol.24
, pp. 118
-
-
Sodini, C.G.1
Wong, S.S.2
Ko, P.-K.3
-
4
-
-
0024173646
-
Design guidelines for deep-submicrometer MOSFETs
-
in
-
M.-C. Jenq, J. Chung, J. E. Moon, G. May, P. K. Ko, and C. Hu, “Design guidelines for deep-submicrometer MOSFETs,” in IEDM Tech. Dig., 1988, p. 386.
-
(1988)
IEDM Tech. Dig.
, pp. 386
-
-
Jenq, M.-C.1
Chung, J.2
Moon, J.E.3
May, G.4
Ko, P.K.5
Hu, C.6
-
5
-
-
0024926071
-
1/4-μm LATID (Large-Angle-Tilt Implanted Drain) technology for3.3-V operation
-
in
-
T. Hori, “1/4-μm LATID (Large-Angle-Tilt Implanted Drain) technology for3.3-V operation,” in IEDM Tech. Dig., 1989, 777.
-
(1989)
IEDM Tech. Dig.
, pp. 777
-
-
Hori, T.1
-
6
-
-
0020114560
-
Advantages of thermal nitride and nitroxide gate films in VLSI process
-
T. Ito, T. Nakamura, and H. Ishikawa, “Advantages of thermal nitride and nitroxide gate films in VLSI process,” IEEE Trans. Electron Devices, vol. ED-29, p. 498, 1982.
-
(1982)
IEEE Trans. Electron Devices
, vol.ED-29
, pp. 498
-
-
Ito, T.1
Nakamura, T.2
Ishikawa, H.3
-
7
-
-
0020909751
-
Electrical properties of nitrided-oxide systems for use in gate dielectrics and EEPROM
-
in
-
S. K. Lai, J. Lee, and V. K. Dham, “Electrical properties of nitrided-oxide systems for use in gate dielectrics and EEPROM,” in IEDM Tech. Dig., 1983, p. 190.
-
(1983)
IEDM Tech. Dig.
, pp. 190
-
-
Lai, S.K.1
Lee, J.2
Dham, V.K.3
-
8
-
-
0023547745
-
Ultra-thin re-oxidized nitrided-oxides prepared by rapid thermal processing
-
in
-
T. Hori and H. Iwasaki, “Ultra-thin re-oxidized nitrided-oxides prepared by rapid thermal processing,” in IEDM Tech. Dig., 1987, p. 570.
-
(1987)
IEDM Tech. Dig.
, pp. 570
-
-
Hori, T.1
Iwasaki, H.2
-
9
-
-
0024610593
-
Electrical and physical properties of ultrathin reoxidized nitrided oxides prepared by rapid thermal processing
-
T. Hori, H. Iwasaki, and K. Tsuji, “Electrical and physical properties of ultrathin reoxidized nitrided oxides prepared by rapid thermal processing,” IEEE Trans. Electron Devices, vol. 36, p. 340, 1989.
-
(1989)
IEEE Trans. Electron Devices
, vol.36
, pp. 340
-
-
Hori, T.1
Iwasaki, H.2
Tsuji, K.3
-
10
-
-
0024048525
-
Optimization of low-pressure nitridation/reoxidation of SiO2 for scaled MOS devices
-
W. Yang, R. Jayaraman, and C. G. Sodini, “Optimization of low-pressure nitridation/reoxidation of SiO2 for scaled MOS devices,” IEEE Trans. Electron Devices, vol. 35, p. 935, 1988.
-
(1988)
IEEE Trans. Electron Devices
, vol.35
, pp. 935
-
-
Yang, W.1
Jayaraman, R.2
Sodini, C.G.3
-
11
-
-
0024611642
-
Improved hot-carrier immunity in submicrometer MOSFET's with reoxidized nitrided oxides prepared by rapid thermal processing
-
T. Hori and H. Iwasaki, “Improved hot-carrier immunity in submicrometer MOSFET's with reoxidized nitrided oxides prepared by rapid thermal processing,” IEEE Electron Devices Lett., vol. 10, p. 64, 1989.
-
(1989)
IEEE Electron Devices Lett.
, vol.10
, pp. 64
-
-
Hori, T.1
Iwasaki, H.2
-
12
-
-
34250894865
-
Improved transconductance under high normal field in MOSFET's with ultrathin nitrided oxides
-
T. Hori and H. Iwasaki, “Improved transconductance under high normal field in MOSFET's with ultrathin nitrided oxides,” IEEE Electron Device Lett., vol. 10, p. 195, 1989.
-
(1989)
IEEE Electron Device Lett.
, vol.10
, pp. 195
-
-
Hori, T.1
Iwasaki, H.2
-
13
-
-
0024048585
-
Short- and long-term reliability of nitrided oxide MISFET's
-
T. Kaga and T. Hagiwara, “Short- and long-term reliability of nitrided oxide MISFET's,” IEEE Trans. Electron Devices, vol. 35, p. 929, 1988.
-
(1988)
IEEE Trans. Electron Devices
, vol.35
, pp. 929
-
-
Kaga, T.1
Hagiwara, T.2
-
14
-
-
0343600558
-
Demands for submicron MOSFET's and nitrided oxide gate-dielectrics
-
in
-
T. Hori, “Demands for submicron MOSFET's and nitrided oxide gate-dielectrics,” in SSDM Ext. Abst., 1989, p. 197.
-
(1989)
SSDM Ext. Abst.
, pp. 197
-
-
Hori, T.1
-
15
-
-
0024090222
-
Inversion layer mobility of MOSFET's with nitrided oxide gate dielectrics
-
M. A. Schmidt, T. L. Terry, B. P. Mathur, and S. D. Senturia, “Inversion layer mobility of MOSFET's with nitrided oxide gate dielectrics,” IEEE Trans. Electron. Devices, vol. 35, p. 1627, 1988.
-
(1988)
IEEE Trans. Electron. Devices
, vol.35
, pp. 1627
-
-
Schmidt, M.A.1
Terry, T.L.2
Mathur, B.P.3
Senturia, S.D.4
-
16
-
-
0025484483
-
Inversion layer mobility under high normal field in nitrided-oxide MOSFET's
-
T. Hori, “Inversion layer mobility under high normal field in nitrided-oxide MOSFET's,” IEEE Trans. Electron Devices, vol. 37, p. 2058, 1990.
-
(1990)
IEEE Trans. Electron Devices
, vol.37
, pp. 2058
-
-
Hori, T.1
-
17
-
-
0023542548
-
The impact of gate-induced drain leakage current on MOSFET scaling
-
in
-
T. Y. Chan, J. Chen, P. K. Ko, and C. Hu, “The impact of gate-induced drain leakage current on MOSFET scaling,” in IEDM Tech. Dig., 1987, p. 718.
-
(1987)
IEDM Tech. Dig.
, pp. 718
-
-
Chan, T.Y.1
Chen, J.2
Ko, P.K.3
Hu, C.4
-
18
-
-
0025659257
-
Drain-structure design for reduced band-to-band and band-to-defect tunneling leakage
-
in
-
T. Hori, “Drain-structure design for reduced band-to-band and band-to-defect tunneling leakage,” in VLSI Symp. Tech. Dig., 1990, p. 69.
-
(1990)
VLSI Symp. Tech. Dig.
, pp. 69
-
-
Hori, T.1
-
19
-
-
0024170747
-
New high transport resist and process technology for KrF excimer laser lithography
-
in
-
M. Sasago, M. Endo, Y. Tani, H. Nakagawa, Y. Hirai, and N. Nomura, “New high transport resist and process technology for KrF excimer laser lithography,” in IEDM Tech. Dig., 1988, p. 88.
-
(1988)
IEDM Tech. Dig.
, pp. 88
-
-
Sasago, M.1
Endo, M.2
Tani, Y.3
Nakagawa, H.4
Hirai, Y.5
Nomura, N.6
-
20
-
-
0024175521
-
A new half-micron p-channel MOSFET with LATIPS (Large-Angle-Tilt Implanted Punchthrough Stopper)
-
in
-
T. Hori and K. Kurimoto, “A new half-micron p-channel MOSFET with LATIPS (Large-Angle-Tilt Implanted Punchthrough Stopper),” in IEDM Tech. Dig., 1988, p. 394.
-
(1988)
IEDM Tech. Dig.
, pp. 394
-
-
Hori, T.1
Kurimoto, K.2
-
21
-
-
0024903935
-
Guidelines for reverse short-channel behavior
-
C. Mazure and M. Orlowski, “Guidelines for reverse short-channel behavior,” IEEE Electron Device Lett., vol. 10, p. 556, 1989.
-
(1989)
IEEE Electron Device Lett.
, vol.10
, pp. 556
-
-
Mazure, C.1
Orlowski, M.2
-
22
-
-
0025536634
-
Mechanical stress induced threshold voltage shifts for nitrided oxide gate n- and p-MOSFET's
-
in
-
H. S. Momose, T. Morimoto, S. Takagi, K. Yamabe, S. Onga, and H. Iwai, “Mechanical stress induced threshold voltage shifts for nitrided oxide gate n- and p-MOSFET's,” in SSDM Ext. Abst., 1990, p. 279.
-
(1990)
SSDM Ext. Abst.
, pp. 279
-
-
Momose, H.S.1
Morimoto, T.2
Takagi, S.3
Yamabe, K.4
Onga, S.5
Iwai, H.6
-
23
-
-
84949083566
-
On the accuracy of channel length characterization of LDD MOSFET's
-
J. Y.-C. Sun, M. R. Wordeman, and S. E. Laux, “On the accuracy of channel length characterization of LDD MOSFET's,” IEEE Trans. Electron Devices., vol. ED-33, p. 1556, 1986.
-
(1986)
IEEE Trans. Elecrron Devices.
, vol.ED-33
, pp. 1556
-
-
Sun, J. Y.-C.1
Wordeman, M.R.2
Laux, S.E.3
-
24
-
-
0023596537
-
Universal mobility-field curves for electrons and holes in MOS inversion layers
-
in
-
J. T. Watt and J. D. Plummer, “Universal mobility-field curves for electrons and holes in MOS inversion layers,” in VLSI Symp. Tech. Dig., 1987, p. 81.
-
(1987)
VLSI Symp. Tech. Dig.
, pp. 81
-
-
Watt, J.T.1
Plummer, J.D.2
-
25
-
-
0021501347
-
The effect of high fields on MOS device and circuit performance
-
C. G. Sodini, P. K. Ko, and J. L. Moll, “The effect of high fields on MOS device and circuit performance,” IEEE Trans. Electron. Devices, vol. ED-31, p. 1386, 1984.
-
(1984)
IEEE Trans. Electron. Devices
, vol.ED-31
, pp. 1386
-
-
Sodini, C.G.1
Ko, P.K.2
Moll, J.L.3
-
26
-
-
84941860993
-
PISCES-2B ver. 9033
-
Palo Alto, CA, Nov
-
Technology Modeling Associates, Inc., “PISCES-2B ver. 9033” two-dimensional device simulation program, Palo Alto, CA, Nov. 1990.
-
(1990)
twodimensional device simulation program.
-
-
-
27
-
-
84881340125
-
Modeling the performance of liquid-nitrogen cooled CMOS VLSI
-
Ph.D. dissertation, Stanford Univ. Tech. Rep. G725-3, May
-
J. T. Watt, “Modeling the performance of liquid-nitrogen cooled CMOS VLSI,” Ph.D. dissertation, Stanford Univ. Tech. Rep. G725-3, May 1989.
-
(1989)
-
-
Watt, J.T.1
-
28
-
-
0020717155
-
High-field drift velocity of electrons at the Si-SiO2 as determined by a time-of-flight technique
-
J. A. Cooper and D. F. Nelson, “High-field drift velocity of electrons at the Si-SiO2 as determined by a time-of-flight technique,” J. Appl. Phys., vol. 54, p. 1445, 1983.
-
(1983)
J. Appl. Phys.
, vol.54
, pp. 1445
-
-
Cooper, J.A.1
Nelson, D.F.2
-
29
-
-
0025463272
-
Circuit performance of CMOS technologies with silicon dioxide and reoxidized nitrided oxide gate dielectrics
-
S. W. Lee, T. Y. Chan, and A. T. Wu, “Circuit performance of CMOS technologies with silicon dioxide and reoxidized nitrided oxide gate dielectrics,” IEEE Electron Device Lett., vol. 11, p. 294, 1990.
-
(1990)
IEEE Electron Device Lett.
, vol.11
, pp. 294
-
-
Lee, S.W.1
Chan, T.Y.2
Wu, A.T.3
-
30
-
-
0024170331
-
Projecting the minimum acceptable oxide thickness for time-dependent dielectric breakdown
-
in
-
R. Moazzami, J. Lee, I.-C. Chen, and C. Hu, “Projecting the minimum acceptable oxide thickness for time-dependent dielectric breakdown,” in IEDM Tech. Dig., 1988, p. 710.
-
(1988)
IEDM Tech. Dig.
, pp. 710
-
-
Moazzami, R.1
Lee, J.2
Chen, I.-C.3
Hu, C.4
-
31
-
-
0024895489
-
Hot carrier related phenomena for n- and p-MOSFETs with nitrided gate oxide by RTP
-
in
-
H. S. Momose, S. Kitagawa, K. Yamabe, and H. Iwai, “Hot carrier related phenomena for n- and p-MOSFETs with nitrided gate oxide by RTP,” in IEDM Tech. Dig., 1989, p. 267.
-
(1989)
IEDM Tech. Dig.
, pp. 267
-
-
Momose, H.S.1
Kitagawa, S.2
Yamabe, K.3
Iwai, H.4
-
32
-
-
84941866560
-
Hot-carrier effects in MOSFET's with nitrided-oxide gate-dielectrics prepared by rapid thermal processing
-
this issue
-
T. Hori, T. Yasui, and S. Akamatsu, “Hot-carrier effects in MOSFET's with nitrided-oxide gate-dielectrics prepared by rapid thermal processing,” this issue, pp. 134-147.
-
-
-
Hori, T.1
Yasui, T.2
Akamatsu, S.3
-
33
-
-
0024926074
-
Nitridation induced surface donor layer in silicon and its impact on the characteristics of n- and p-channel MOSFETs
-
in
-
A. T. Wu, T. Y. Chan, V. Murali, S. W. Lee, J. Nulman, and M. Garner, “Nitridation induced surface donor layer in silicon and its impact on the characteristics of n- and p-channel MOSFETs,” in IEDM Tech. Dig., 1989, p. 271.
-
(1989)
IEDM Tech. Dig.
, pp. 271
-
-
Wu, A.T.1
Chan, T.Y.2
Murali, V.3
Lee, S.W.4
Nulman, J.5
Garner, M.6
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