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Volumn 41, Issue 1, 1992, Pages 12-17

Implementing Sequential Machines as Self-Timed Circuits

Author keywords

Asynchronous systems; combinational logic; delay insensitive; finite state machines; master slave register; self timed

Indexed keywords

AUTOMATA THEORY--FINITE AUTOMATA; SWITCHING THEORY--SEQUENTIAL SWITCHING;

EID: 0026626389     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.123378     Document Type: Article
Times cited : (18)

References (13)
  • 1
    • 0003221274 scopus 로고
    • A delay insensitive regular expression recognizer
    • Sept.
    • T. S. Anantharaman, “A delay insensitive regular expression recognizer,” IEEE VLSI Tech. Bull., vol. 1, no. 2, Sept. 1986.
    • (1986) IEEE VLSI Tech. Bull , vol.1 , Issue.2
    • Anantharaman, T.S.1
  • 3
    • 0026623593 scopus 로고    scopus 로고
    • An efficient implementation of Boolean functions as self-timed circuits
    • this issue
    • I. David, R. Ginosar, and M. Yoeli, “An efficient implementation of Boolean functions as self-timed circuits,” IEEE Trans. Comput., this issue, pp. 2–11.
    • IEEE Trans. Comput , pp. 2-11
    • David, I.1    Ginosar, R.2    Yoeli, M.3
  • 7
    • 0022879965 scopus 로고
    • Compiling communicating processes into delay insensitive VLSI circuits
    • A. J. Martin, “Compiling communicating processes into delay insensitive VLSI circuits,” Distributed Comput., vol. 1, no. 3, pp. 226–234, 1986.
    • (1986) Distributed Comput , vol.1 , Issue.3 , pp. 226-234
    • Martin, A.J.1
  • 11
    • 84909727457 scopus 로고
    • Concurrent computations and VLSI circuits
    • M. Broy, Ed. Berlin, Germany Springer-Verlag
    • M. Rem, “Concurrent computations and VLSI circuits,” in Control Flow and Data Flow; Concepts of Distributed Computing, M. Broy, Ed. Berlin, Germany, Springer-Verlag, 1985, pp. 399–437.
    • (1985) Control Flow and Data Flow; Concepts of Distributed Computing , pp. 399-437
    • Rem, M.1
  • 12
    • 0001951703 scopus 로고
    • System timing
    • C. Mead and L. Conway, Eds. Reading, MA: Addison-Wesley
    • C.L. Seitz, “System timing,” in Introduction to VLSI Systems, C. Mead and L. Conway, Eds. Reading, MA: Addison-Wesley, 1980, pp. 218–262.
    • (1980) Introduction to VLSI Systems , pp. 218-262
    • Seitz, C.L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.