Mod m arithmetic in binary systems

Information Processing Letters

Volumn 40, Issue 6, 1991, Pages 303-309

  Barsi, Ferruccio ^a  

^a ISTI CNR   (Italy)

Author keywords

Computational complexity; computer architecture; modular arithmetic; residue arithmetic; VLSI complexity

Indexed keywords

INTEGRATED CIRCUITS, VLSI;

MOD M ARITHMETIC;

MATHEMATICAL TECHNIQUES;

EID: 0026406257     PISSN: 00200190     EISSN: None     Source Type: Journal    
DOI: 10.1016/0020-0190(91)90198-Q     Document Type: Article

References (13)

1. n + 1) arithmetic logic
2. A fast near optimum VLSI implementation of FFT using residue number systems
3. Addition and over flow handling in a class of redundant RNS with magnitude index
4. Application of residue arithmetic to recursive digital filters
5. A Regular Layout for Parallel Adders
6. Implementation of fast digital processor using the residue number system
7. Techniques for high-precision digital filtering with multiple microprocessor
8. A highly efficient residue-combinatorial architecture for digital filters
9. A comparison of residue number multipliers and 2's complement multipliers implemented by stored multiplication tables
10. Using ROM arrays to implement computer arithmetic
11. Area—Time optimal VLSI integer multiplier with minimum computation time
12. Processor Architectures for Two-Dimensional Convolvers Using a Single Multiplexed Computational Element with Finite Field Arithmetic
13. Large moduli multipliers for signal processing